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Trivial fixups to get this board further along. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4675 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Ronald G. Minnich 2009-09-25 19:53:59 +00:00
parent 03bdc3e070
commit 45847beb49
4 changed files with 47 additions and 34 deletions
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4
src/mainboard/dell/s1850/Options.lb
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@ -183,10 +183,10 @@ default CONFIG_GDB_STUB=0
default CONFIG_CONSOLE_SERIAL8250=1 default CONFIG_CONSOLE_SERIAL8250=1
## Select the serial console baud rate ## Select the serial console baud rate
default CONFIG_TTYS0_BAUD=115200 #default CONFIG_TTYS0_BAUD=115200
#default CONFIG_TTYS0_BAUD=57600 #default CONFIG_TTYS0_BAUD=57600
#default CONFIG_TTYS0_BAUD=38400 #default CONFIG_TTYS0_BAUD=38400
#default CONFIG_TTYS0_BAUD=19200 default CONFIG_TTYS0_BAUD=19200
#default CONFIG_TTYS0_BAUD=9600 #default CONFIG_TTYS0_BAUD=9600
#default CONFIG_TTYS0_BAUD=4800 #default CONFIG_TTYS0_BAUD=4800
#default CONFIG_TTYS0_BAUD=2400 #default CONFIG_TTYS0_BAUD=2400

14
src/mainboard/dell/s1850/auto.c
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@ -13,14 +13,13 @@
#include "lib/ramtest.c" #include "lib/ramtest.c"
#include "southbridge/intel/i82801er/i82801er_early_smbus.c" #include "southbridge/intel/i82801er/i82801er_early_smbus.c"
#include "northbridge/intel/e7520/raminit.h" #include "northbridge/intel/e7520/raminit.h"
#include "superio/winbond/w83627hf/w83627hf.h" #include "superio/nsc/pc8374/pc8374_early_serial.c"
#include "cpu/x86/lapic/boot_cpu.c" #include "cpu/x86/lapic/boot_cpu.c"
#include "cpu/x86/mtrr/earlymtrr.c" #include "cpu/x86/mtrr/earlymtrr.c"
#include "debug.c" #include "debug.c"
#include "watchdog.c" #include "watchdog.c"
#include "reset.c" #include "reset.c"
#include "s2850_fixups.c" #include "s1850_fixups.c"
#include "superio/winbond/w83627hf/w83627hf_early_init.c"
#include "northbridge/intel/e7520/memory_initialized.c" #include "northbridge/intel/e7520/memory_initialized.c"
#include "cpu/x86/bist.h" #include "cpu/x86/bist.h"
@ -28,8 +27,7 @@
#define SIO_GPIO_BASE 0x680 #define SIO_GPIO_BASE 0x680
#define SIO_XBUS_BASE 0x4880 #define SIO_XBUS_BASE 0x4880
#define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) #define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, PC8374_SP1)
#define HIDDEN_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP2)
#define DEVPRES_CONFIG ( \ #define DEVPRES_CONFIG ( \
DEVPRES_D0F0 | \ DEVPRES_D0F0 | \
@ -201,11 +199,9 @@ static void main(unsigned long bist)
} }
} }
/* Setup the console */ /* Setup the console */
mainboard_set_ich5();
bmc_foad(); bmc_foad();
outb(0x87,0x2e); pc8374_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
outb(0x87,0x2e);
pnp_write_config(CONSOLE_SERIAL_DEV, 0x24, 0x84 | (1 << 6));
w83627hf_enable_dev(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
uart_init(); uart_init();
console_init(); console_init();

40
src/mainboard/dell/s1850/s1850_fixups.c Normal file
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@ -0,0 +1,40 @@
#include <arch/romcc_io.h>
static void mch_reset(void)
{
return;
}
static void mainboard_set_e7520_pll(unsigned bits)
{
return;
}
static void mainboard_set_e7520_leds(void)
{
return;
}
static void mainboard_set_ich5(void)
{
/* coma is 0x3f8 , comb is 0x2f8*/
pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xe0, 0x10);
/* enable decoding of various devices */
pci_write_config16(PCI_DEV(0, 0x1f, 0), 0xe6, 0x140f);
/* 1M flash */
pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xe3, 0xc0);
pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xf0, 0x0);
/* disable certain devices -- see data sheet -- this is from
* dell settings via lspci
* Note that they leave SMBUS disabled -- 8f6f.
* we leave it enabled and visible in config space -- 8f66
*/
pci_write_config16(PCI_DEV(0, 0x1f, 0), 0xf2, 0x8f66);
}

23
src/mainboard/dell/s1850/s2850_fixups.c
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@ -1,23 +0,0 @@
#include <arch/romcc_io.h>
static void mch_reset(void)
{
return;
}
static void mainboard_set_e7520_pll(unsigned bits)
{
return;
}
static void mainboard_set_e7520_leds(void)
{
return;
}