soc/braswell: Fix P-state table
Incorrect bus-core-ratio been used to generate P-state table Original-Reviewed-on: https://chromium-review.googlesource.com/290681 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I4a34ec80ff3f2ed46dc074c9f8fe06756db8b357 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/12731 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@ -43,6 +43,7 @@
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#define MSR_CPU_THERM_CFG2 0x674
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#define MSR_CPU_THERM_CFG2 0x674
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#define MSR_CPU_THERM_SENS_CFG 0x675
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#define MSR_CPU_THERM_SENS_CFG 0x675
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#define BUS_FREQ_KHZ 100000 /* 100 MHz */
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/* Read BCLK from MSR */
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unsigned int cpu_bus_freq_khz(void);
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#endif /* _SOC_MSR_H_ */
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#endif /* _SOC_MSR_H_ */
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@ -44,7 +44,7 @@ struct pattrs {
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const void *microcode_patch;
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const void *microcode_patch;
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int address_bits;
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int address_bits;
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int num_cpus;
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int num_cpus;
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unsigned bclk_khz;
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unsigned int bclk_khz;
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};
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};
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/*
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/*
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@ -128,7 +128,7 @@ static void fill_in_pattrs(void)
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attrs->iacore_vids[IACORE_TURBO] = (msr.lo & 0xff); /* 1 core max */
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attrs->iacore_vids[IACORE_TURBO] = (msr.lo & 0xff); /* 1 core max */
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/* Set bus clock speed */
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/* Set bus clock speed */
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attrs->bclk_khz = BUS_FREQ_KHZ;
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attrs->bclk_khz = cpu_bus_freq_khz();
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}
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}
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static inline void set_acpi_sleep_type(int val)
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static inline void set_acpi_sleep_type(int val)
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@ -26,12 +26,38 @@
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#endif
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#endif
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#include <stdint.h>
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#include <stdint.h>
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static const unsigned int cpu_bus_clk_freq_table[] = {
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83333,
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100000,
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133333,
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116666,
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80000,
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93333,
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90000,
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88900,
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87500
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};
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unsigned int cpu_bus_freq_khz(void)
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{
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msr_t clk_info = rdmsr(MSR_BSEL_CR_OVERCLOCK_CONTROL);
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if((clk_info.lo & 0xF) < (sizeof(cpu_bus_clk_freq_table)/sizeof(unsigned int)))
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{
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return(cpu_bus_clk_freq_table[clk_info.lo & 0xF]);
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}
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return 0;
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}
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unsigned long tsc_freq_mhz(void)
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unsigned long tsc_freq_mhz(void)
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{
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{
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msr_t ia_core_ratios;
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msr_t platform_info;
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unsigned int bclk_khz = cpu_bus_freq_khz();
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ia_core_ratios = rdmsr(MSR_IACORE_RATIOS);
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if (!bclk_khz)
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return (BUS_FREQ_KHZ * ((ia_core_ratios.lo >> 16) & 0x3f)) / 1000;
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return 0;
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platform_info = rdmsr(MSR_PLATFORM_INFO);
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return (bclk_khz * ((platform_info.lo >> 8) & 0xff)) / 1000;
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}
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}
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#if !ENV_SMM
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#if !ENV_SMM
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