From 45a6ae35ef9c605ff3ce47f98b8cfe53cccbdf7d Mon Sep 17 00:00:00 2001
From: Arthur Heymans <arthur@aheymans.xyz>
Date: Wed, 16 Dec 2020 21:55:17 +0100
Subject: [PATCH] soc/intel/xeon_sp/skx: Properly set up MTRR's

Don't depend on the MTRR setup left over from FSP-M ExitTempRam.

Change-Id: I299123b3cd3c37b4345102c20fda77bf261892a2
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48673
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
---
 src/soc/intel/xeon_sp/skx/cpu.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/soc/intel/xeon_sp/skx/cpu.c b/src/soc/intel/xeon_sp/skx/cpu.c
index d36f11be66..f9cd356efc 100644
--- a/src/soc/intel/xeon_sp/skx/cpu.c
+++ b/src/soc/intel/xeon_sp/skx/cpu.c
@@ -193,7 +193,8 @@ static void pre_mp_init(void)
 {
 	printk(BIOS_DEBUG, "%s: entry\n", __func__);
 
-	x86_setup_fixed_mtrrs();
+	x86_setup_mtrrs_with_detect();
+	x86_mtrr_check();
 }
 
 static void post_mp_init(void)