mb/intel/dg43gt: Make devicetree prettier
Use lowercase for hex constants and align comments and register values. Change-Id: Ib14906113e366a2a6f268fe8b8be32b1794fb344 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38077 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -21,7 +21,7 @@ chip northbridge/intel/x4x # Northbridge
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device lapic 0 on end
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end
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chip cpu/intel/model_1067x # CPU
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device lapic 0xACAC off end
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device lapic 0xacac off end
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end
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end
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device domain 0 on # PCI domain
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@ -62,7 +62,7 @@ chip northbridge/intel/x4x # Northbridge
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device pci 1d.2 on end # USB
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device pci 1d.7 on end # USB
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device pci 1e.0 on end # PCI bridge
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device pci 1f.0 on # ISA bridge
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device pci 1f.0 on # LPC bridge
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chip superio/winbond/w83627dhg # Super I/O
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device pnp 2e.0 on # Floppy
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# GLOBAL
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@ -109,16 +109,14 @@ chip northbridge/intel/x4x # Northbridge
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end
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device pci 1f.1 on end # PATA/IDE
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device pci 1f.2 on end # SATA
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device pci 1f.3 on # SMbus
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device pci 1f.3 on # SMBus
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chip drivers/i2c/ck505 # SLG8XP549T
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register "mask" = "{ 0xff, 0xff, 0xff,
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register "mask" = "{ 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff,
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0xff, 0xff }"
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register "regs" = "{ 0x11, 0xd9, 0xff,
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0xfd, 0xff, 0x00, 0x00,
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0x06, 0x10, 0x05, 0x01,
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0x80, 0x0d }"
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0xff, 0xff, 0xff, 0xff, 0xff }"
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register "regs" = "{ 0x11, 0xd9, 0xff, 0xfd,
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0xff, 0x00, 0x00, 0x06,
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0x10, 0x05, 0x01, 0x80, 0x0d }"
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device i2c 69 on end
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end
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end
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