mb/intel/dg43gt: Make devicetree prettier

Use lowercase for hex constants and align comments and register values.

Change-Id: Ib14906113e366a2a6f268fe8b8be32b1794fb344
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38077
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-01-01 21:44:21 +01:00 committed by Nico Huber
parent 221b894e7d
commit 45b5e03641
1 changed files with 40 additions and 42 deletions

View File

@ -21,7 +21,7 @@ chip northbridge/intel/x4x # Northbridge
device lapic 0 on end
end
chip cpu/intel/model_1067x # CPU
device lapic 0xACAC off end
device lapic 0xacac off end
end
end
device domain 0 on # PCI domain
@ -62,7 +62,7 @@ chip northbridge/intel/x4x # Northbridge
device pci 1d.2 on end # USB
device pci 1d.7 on end # USB
device pci 1e.0 on end # PCI bridge
device pci 1f.0 on # ISA bridge
device pci 1f.0 on # LPC bridge
chip superio/winbond/w83627dhg # Super I/O
device pnp 2e.0 on # Floppy
# GLOBAL
@ -109,16 +109,14 @@ chip northbridge/intel/x4x # Northbridge
end
device pci 1f.1 on end # PATA/IDE
device pci 1f.2 on end # SATA
device pci 1f.3 on # SMbus
device pci 1f.3 on # SMBus
chip drivers/i2c/ck505 # SLG8XP549T
register "mask" = "{ 0xff, 0xff, 0xff,
register "mask" = "{ 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff,
0xff, 0xff }"
register "regs" = "{ 0x11, 0xd9, 0xff,
0xfd, 0xff, 0x00, 0x00,
0x06, 0x10, 0x05, 0x01,
0x80, 0x0d }"
0xff, 0xff, 0xff, 0xff, 0xff }"
register "regs" = "{ 0x11, 0xd9, 0xff, 0xfd,
0xff, 0x00, 0x00, 0x06,
0x10, 0x05, 0x01, 0x80, 0x0d }"
device i2c 69 on end
end
end