mb/intel/dg43gt: Make devicetree prettier
Use lowercase for hex constants and align comments and register values. Change-Id: Ib14906113e366a2a6f268fe8b8be32b1794fb344 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38077 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons
Nico Huber
parent
221b894e7d
commit
45b5e03641
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@ -20,15 +20,15 @@ chip northbridge/intel/x4x # Northbridge
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chip cpu/intel/socket_LGA775
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device lapic 0 on end
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end
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chip cpu/intel/model_1067x # CPU
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device lapic 0xACAC off end
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chip cpu/intel/model_1067x # CPU
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device lapic 0xacac off end
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end
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end
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device domain 0 on # PCI domain
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subsystemid 0x8086 0x0028 inherit
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device pci 0.0 on end # Host Bridge
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device pci 2.0 on end # Integrated graphics controller
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device pci 2.1 on end # Integrated graphics controller 2
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device pci 0.0 on end # Host Bridge
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device pci 2.0 on end # Integrated graphics controller
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device pci 2.1 on end # Integrated graphics controller 2
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device pci 3.0 off end # ME
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device pci 3.1 off end # ME
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chip southbridge/intel/i82801jx # Southbridge
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@ -40,54 +40,54 @@ chip northbridge/intel/x4x # Northbridge
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register "sata_traffic_monitor" = "0"
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# Enable PCIe ports 0,2,3 as slots.
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register "pcie_slot_implemented" = "0xb"
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register "pcie_slot_implemented" = "0xb"
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register "gen1_dec" = "0x00fc0601"
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register "gen2_dec" = "0x00fc0291"
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device pci 19.0 on end # GBE
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device pci 1a.0 on end # USB
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device pci 1a.1 on end # USB
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device pci 1a.2 on end # USB
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device pci 1a.7 on end # USB
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device pci 1b.0 on end # Audio
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device pci 1c.0 on end # PCIe 1
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device pci 19.0 on end # GBE
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device pci 1a.0 on end # USB
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device pci 1a.1 on end # USB
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device pci 1a.2 on end # USB
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device pci 1a.7 on end # USB
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device pci 1b.0 on end # Audio
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device pci 1c.0 on end # PCIe 1
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device pci 1c.1 off end # PCIe 2
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device pci 1c.2 on end # PCIe 3
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device pci 1c.3 on end # PCIe 4
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device pci 1c.2 on end # PCIe 3
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device pci 1c.3 on end # PCIe 4
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device pci 1c.4 off end # PCIe 5
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device pci 1c.5 off end # PCIe 6
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device pci 1d.0 on end # USB
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device pci 1d.1 on end # USB
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device pci 1d.2 on end # USB
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device pci 1d.7 on end # USB
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device pci 1e.0 on end # PCI bridge
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device pci 1f.0 on # ISA bridge
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device pci 1d.0 on end # USB
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device pci 1d.1 on end # USB
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device pci 1d.2 on end # USB
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device pci 1d.7 on end # USB
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device pci 1e.0 on end # PCI bridge
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device pci 1f.0 on # LPC bridge
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chip superio/winbond/w83627dhg # Super I/O
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device pnp 2e.0 on # Floppy
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# GLOBAL
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io 0x60 = 0x3f0
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io 0x60 = 0x3f0
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irq 0x70 = 6
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drq 0x74 = 2
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end
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device pnp 2e.1 on # Parallel port
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io 0x60 = 0x378
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io 0x60 = 0x378
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irq 0x70 = 5
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drq 0x74 = 4
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end
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device pnp 2e.2 on # COM 1
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io 0x60 = 0x3f8
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.3 off end # COM 2
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device pnp 2e.5 on # Keyboard
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io 0x60 = 0x60
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io 0x60 = 0x60
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irq 0x70 = 1
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io 0x62 = 0x64
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io 0x62 = 0x64
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irq 0xf0 = 0x85
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end
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device pnp 2e.6 off end # SPI
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device pnp 2e.7 on end # GPIO 6
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device pnp 2e.7 on end # GPIO 6
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device pnp 2e.8 off end # WDTO# PLED
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device pnp 2e.9 off end # GPIO 2
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device pnp 2e.109 on # GPIO 3
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@ -99,31 +99,29 @@ chip northbridge/intel/x4x # Northbridge
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irq 0xe1 = 0x01
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end
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device pnp 2e.a on # ACPI
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irq 0xe4 = 0x30 # power dram during S3
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irq 0xe4 = 0x30 # power dram during S3
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end
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device pnp 2e.b on # Hardware monitor
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io 0x60 = 0x290
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io 0x60 = 0x290
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end
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device pnp 2e.c off end # PECI, SST
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end
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end
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device pci 1f.1 on end # PATA/IDE
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device pci 1f.2 on end # SATA
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device pci 1f.3 on # SMbus
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chip drivers/i2c/ck505 # SLG8XP549T
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register "mask" = "{ 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff,
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0xff, 0xff }"
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register "regs" = "{ 0x11, 0xd9, 0xff,
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0xfd, 0xff, 0x00, 0x00,
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0x06, 0x10, 0x05, 0x01,
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0x80, 0x0d }"
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device pci 1f.1 on end # PATA/IDE
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device pci 1f.2 on end # SATA
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device pci 1f.3 on # SMBus
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chip drivers/i2c/ck505 # SLG8XP549T
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register "mask" = "{ 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff }"
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register "regs" = "{ 0x11, 0xd9, 0xff, 0xfd,
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0xff, 0x00, 0x00, 0x06,
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0x10, 0x05, 0x01, 0x80, 0x0d }"
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device i2c 69 on end
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end
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end
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device pci 1f.4 off end
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device pci 1f.5 on end # IDE
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device pci 1f.5 on end # IDE
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device pci 1f.6 off end
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end
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end
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