Add Kconfig support for kontron/kt960.
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4777 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Myles Watson
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@ -3,5 +3,6 @@ choice
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depends on VENDOR_KONTRON
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source "src/mainboard/kontron/986lcd-m/Kconfig"
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source "src/mainboard/kontron/kt690/Kconfig"
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endchoice
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@ -0,0 +1,124 @@
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config BOARD_KONTRON_KT690
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bool "KT690"
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select ARCH_X86
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select CPU_AMD_K8
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select CPU_AMD_SOCKET_S1G1
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select NORTHBRIDGE_AMD_AMDK8
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select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
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select SOUTHBRIDGE_AMD_RS690
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select SOUTHBRIDGE_AMD_SB600
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select SUPERIO_WINBOND_W83627DHG
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select HAVE_MAINBOARD_RESOURCES
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select GFXUMA
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select USE_PRINTK_IN_CAR
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select USE_DCACHE_RAM
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select HAVE_HARD_RESET
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select IOAPIC
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select HAVE_ACPI_TABLES
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config MAINBOARD_DIR
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string
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default kontron/kt690
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depends on BOARD_KONTRON_KT690
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0x1488
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depends on BOARD_KONTRON_KT690
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config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
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hex
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default 0x6900
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depends on BOARD_KONTRON_KT690
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config LB_CKS_RANGE_START
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int
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default 49
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depends on BOARD_KONTRON_KT690
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config APIC_ID_OFFSET
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hex
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default 0x0
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depends on BOARD_KONTRON_KT690
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config VIDEO_MB
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int
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default 1
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depends on BOARD_KONTRON_KT690
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config LB_CKS_RANGE_END
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int
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default 122
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depends on BOARD_KONTRON_KT690
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config LB_CKS_LOC
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int
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default 123
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depends on BOARD_KONTRON_KT690
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config MAINBOARD_PART_NUMBER
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string
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default "KT690"
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depends on BOARD_KONTRON_KT690
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config HEAP_SIZE
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hex
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default 0x8000
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depends on BOARD_KONTRON_KT690
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config HW_MEM_HOLE_SIZEK
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hex
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default 0x100000
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depends on BOARD_KONTRON_KT690
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config MAX_CPUS
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int
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default 2
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depends on BOARD_KONTRON_KT690
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config MAX_PHYSICAL_CPUS
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int
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default 1
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depends on BOARD_KONTRON_KT690
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config HAVE_OPTION_TABLE
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bool
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default n
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depends on BOARD_KONTRON_KT690
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config HW_MEM_HOLE_SIZE_AUTO_INC
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bool
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default n
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depends on BOARD_KONTRON_KT690
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config SB_HT_CHAIN_ON_BUS0
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int
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default 1
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depends on BOARD_KONTRON_KT690
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config SB_HT_CHAIN_UNITID_OFFSET_ONLY
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bool
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default y
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depends on BOARD_KONTRON_KT690
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config HT_CHAIN_END_UNITID_BASE
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hex
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default 0x1
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depends on BOARD_KONTRON_KT690
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config HT_CHAIN_UNITID_BASE
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hex
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default 0x0
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depends on BOARD_KONTRON_KT690
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config USE_INIT
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bool
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default n
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depends on BOARD_KONTRON_KT690
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config IRQ_SLOT_COUNT
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int
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default 11
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depends on BOARD_KONTRON_KT690
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@ -0,0 +1,64 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2007-2008 coresystems GmbH
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##
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## This program is free software; you can redistribute it and/or
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## modify it under the terms of the GNU General Public License as
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## published by the Free Software Foundation; version 2 of
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## the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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## MA 02110-1301 USA
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##
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driver-y += mainboard.o
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# Needed by irq_tables and mptable and acpi_tables.
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obj-y += get_bus_conf.o
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obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o
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obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o
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obj-$(CONFIG_HAVE_ACPI_TABLES) += dsdt.o
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obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o
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obj-$(CONFIG_HAVE_ACPI_TABLES) += fadt.o
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# This is part of the conversion to init-obj and away from included code.
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initobj-y += crt0.o
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# FIXME in $(top)/Makefile
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crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc
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crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc
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crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc
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crt0-y += ../../../../src/arch/i386/lib/id.inc
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crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc
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crt0-y += auto.inc
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ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb
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ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds
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ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds
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ldscript-y += ../../../../src/arch/i386/lib/id.lds
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ldscript-y += ../../../../src/arch/i386/lib/failover.lds
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ifdef POST_EVALUATION
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$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/acpi/dsdt.asl
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iasl -p $(obj)/dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/acpi/dsdt.asl
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mv $(obj)/dsdt.hex $@
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$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
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$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
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$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
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$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
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perl -e 's/\.rodata/.rom.data/g' -pi $@
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perl -e 's/\.text/.section .rom.text/g' -pi $@
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endif
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@ -2,7 +2,7 @@
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#Define vga_rom_address = 0xfff0000
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#Define port_enable, (bit map): GFX(2,3), GPP(4,5,6,7)
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#Define gfx_dev2_dev3, 0: a link will never be established on Dev2 or Dev3,
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# 1: the system allows a PCIE link to be established on Dev2 or Dev3.
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# 1: the system allows a PCIE link to be established on Dev2 or Dev3.
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#Define gfx_dual_slot, 0: single slot, 1: dual slot
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#Define gfx_lane_reversal, 0: disable lane reversal, 1: enable
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#Define gfx_tmds, 0: didn't support TMDS, 1: support
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@ -106,10 +106,10 @@ chip northbridge/amd/amdk8/root_complex
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io 0x60 = 0xa10
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end
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device pnp 2e.c off # PECI, SST
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endif
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end
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end #superio/winbond/w83627dhg
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#chip superio/smsc/fdc37n972
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# seems this chip is not used?
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#end
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end #LPC
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device pci 14.4 on end # PCI 0x4384
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