mb/google/hatch/var/kindred: Configure GPIOs for SSD SKUs
Configure GPIOs for SSD SKUs BUG=b:132918661 TEST=Verify eMMC is disabled when SKU ID = 1/3/23/24 Change-Id: Ief48a2fd2fa078aa5d89aec01f99af75510334b2 Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34851 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -18,6 +18,41 @@
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#include <baseboard/variants.h>
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#include <commonlib/helpers.h>
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static const struct pad_config ssd_sku_gpio_table[] = {
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/* F3 : MEM_STRAP_3 */
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PAD_CFG_GPI(GPP_F3, NONE, PLTRST),
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/* F10 : MEM_STRAP_2 */
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PAD_CFG_GPI(GPP_F10, NONE, PLTRST),
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/* F11 : EMMC_CMD ==> NC */
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PAD_NC(GPP_F11, NONE),
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/* F12 : EMMC_DATA0 ==> NC */
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PAD_NC(GPP_F12, NONE),
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/* F13 : EMMC_DATA1 ==> NC */
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PAD_NC(GPP_F13, NONE),
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/* F14 : EMMC_DATA2 ==> NC */
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PAD_NC(GPP_F14, NONE),
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/* F15 : EMMC_DATA3 ==> NC */
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PAD_NC(GPP_F15, NONE),
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/* F16 : EMMC_DATA4 ==> NC */
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PAD_NC(GPP_F16, NONE),
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/* F17 : EMMC_DATA5 ==> NC */
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PAD_NC(GPP_F17, NONE),
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/* F18 : EMMC_DATA6 ==> NC */
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PAD_NC(GPP_F18, NONE),
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/* F19 : EMMC_DATA7 ==> NC */
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PAD_NC(GPP_F19, NONE),
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/* F20 : EMMC_RCLK ==> NC */
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PAD_NC(GPP_F20, NONE),
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/* F21 : EMMC_CLK ==> NC */
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PAD_NC(GPP_F21, NONE),
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/* F22 : EMMC_RESET# ==> NC */
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PAD_NC(GPP_F22, NONE),
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/* H19 : MEM_STRAP_0 */
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PAD_CFG_GPI(GPP_H19, NONE, PLTRST),
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/* H22 : MEM_STRAP_1 */
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PAD_CFG_GPI(GPP_H22, NONE, PLTRST),
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};
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static const struct pad_config gpio_table[] = {
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/* F3 : MEM_STRAP_3 */
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PAD_CFG_GPI(GPP_F3, NONE, PLTRST),
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@ -55,6 +90,12 @@ static const struct pad_config gpio_table[] = {
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const struct pad_config *override_gpio_table(size_t *num)
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{
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uint32_t sku_id = get_board_sku();
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/* For SSD SKU */
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if (sku_id == 1 || sku_id == 3 || sku_id == 23 || sku_id == 24) {
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*num = ARRAY_SIZE(ssd_sku_gpio_table);
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return ssd_sku_gpio_table;
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}
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*num = ARRAY_SIZE(gpio_table);
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return gpio_table;
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}
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