diff --git a/src/southbridge/intel/i82801jx/bootblock.c b/src/southbridge/intel/i82801jx/bootblock.c
index cc685c4544..115555c599 100644
--- a/src/southbridge/intel/i82801jx/bootblock.c
+++ b/src/southbridge/intel/i82801jx/bootblock.c
@@ -14,8 +14,21 @@
  */
 
 #include <arch/io.h>
+#include <cpu/x86/tsc.h>
 #include "i82801jx.h"
 
+static void store_initial_timestamp(void)
+{
+	/*
+	 * We have two 32bit scratchpad registers available:
+	 * D0:F0  0xdc (SKPAD)
+	 * D31:F2 0xd0 (SATA SP)
+	 */
+	tsc_t tsc = rdtsc();
+	pci_write_config32(PCI_DEV(0, 0x00, 0), 0xdc, tsc.lo);
+	pci_write_config32(PCI_DEV(0, 0x1f, 2), 0xd0, tsc.hi);
+}
+
 static void enable_spi_prefetch(void)
 {
 	u8 reg8;
@@ -31,6 +44,7 @@ static void enable_spi_prefetch(void)
 
 static void bootblock_southbridge_init(void)
 {
+	store_initial_timestamp();
 	enable_spi_prefetch();
 
 	/* Enable RCBA */