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mb/pcengines/apu2/mptable.c: add GNB IOAPIC to MP Table 

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I385339761b3e1b5dcadb67b8ca29b1518c2db408
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39702
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Michał Żygowski 2020-03-19 16:12:42 +01:00 committed by Patrick Georgi
parent 3fbd2af112
commit 4629830b73
1 changed files with 6 additions and 0 deletions
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6
src/mainboard/pcengines/apu2/mptable.c
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@ -15,6 +15,7 @@
#include <arch/smp/mpspec.h>
#include <arch/ioapic.h>
#include <stdint.h>
#include <northbridge/amd/pi/nb_common.h>
#include <southbridge/amd/common/amd_pci_util.h>
static void *smp_write_config_table(void *v)
@ -50,6 +51,11 @@ static void *smp_write_config_table(void *v)
smp_write_ioapic(mc, ioapic_id, ioapic_ver, VIO_APIC_VADDR);
ioapic_id = (io_apic_read((void *)IO_APIC2_ADDR, 0x00) >> 24);
ioapic_ver = (io_apic_read((void *)IO_APIC2_ADDR, 0x01) & 0xFF);
smp_write_ioapic(mc, ioapic_id, ioapic_ver, (void *)IO_APIC2_ADDR);
/* I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
#define IO_LOCAL_INT(type, intr, apicid, pin) \
smp_write_lintsrc(mc, (type), MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH, bus_isa, (intr), (apicid), (pin));