diff --git a/src/soc/intel/apollolake/meminit_util_apl.c b/src/soc/intel/apollolake/meminit_util_apl.c
index a11c5d8031..b272a99efe 100644
--- a/src/soc/intel/apollolake/meminit_util_apl.c
+++ b/src/soc/intel/apollolake/meminit_util_apl.c
@@ -90,6 +90,7 @@ void save_lpddr4_dimm_info_part_num(const char *dram_part_num)
 				src_dimm->DimmId,
 				dram_part_num,
 				strlen(dram_part_num),
+				NULL, /* SPD not available */
 				memory_info_hob->DataWidth);
 			index++;
 		}
diff --git a/src/soc/intel/apollolake/meminit_util_glk.c b/src/soc/intel/apollolake/meminit_util_glk.c
index 9bfdf0b8a5..29dcd56767 100644
--- a/src/soc/intel/apollolake/meminit_util_glk.c
+++ b/src/soc/intel/apollolake/meminit_util_glk.c
@@ -96,6 +96,7 @@ void save_lpddr4_dimm_info_part_num(const char *dram_part_num)
 				    src_dimm->DimmId,
 				    dram_part_num,
 				    strlen(dram_part_num),
+				    src_dimm->SpdSave + SPD_SAVE_OFFSET_SERIAL,
 				    memory_info_hob->DataWidth);
 				index++;
 			}
diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c
index 661c98a466..98d4c006a8 100644
--- a/src/soc/intel/cannonlake/romstage/romstage.c
+++ b/src/soc/intel/cannonlake/romstage/romstage.c
@@ -111,6 +111,7 @@ static void save_dimm_info(void)
 				src_dimm->DimmId,
 				dram_part_num,
 				dram_part_num_len,
+				src_dimm->SpdSave + SPD_SAVE_OFFSET_SERIAL,
 				memory_info_hob->DataWidth);
 			index++;
 		}
diff --git a/src/soc/intel/common/smbios.c b/src/soc/intel/common/smbios.c
index 0b1be8817e..d89e9d5827 100644
--- a/src/soc/intel/common/smbios.c
+++ b/src/soc/intel/common/smbios.c
@@ -22,7 +22,7 @@
 void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type,
 		u32 frequency, u8 rank_per_dimm, u8 channel_id, u8 dimm_id,
 		const char *module_part_num, size_t module_part_number_size,
-		u16 data_width)
+		const u8 *module_serial_num, u16 data_width)
 {
 	dimm->dimm_size = dimm_capacity;
 	dimm->ddr_type = ddr_type;
@@ -34,6 +34,9 @@ void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type,
 			module_part_num,
 			min(sizeof(dimm->module_part_number),
 				module_part_number_size));
+	if (module_serial_num)
+		memcpy(dimm->serial, module_serial_num,
+		       DIMM_INFO_SERIAL_SIZE);
 	switch (data_width) {
 	case 8:
 		dimm->bus_width = MEMORY_BUS_WIDTH_8;
diff --git a/src/soc/intel/common/smbios.h b/src/soc/intel/common/smbios.h
index 33b5d0df04..5824f5d665 100644
--- a/src/soc/intel/common/smbios.h
+++ b/src/soc/intel/common/smbios.h
@@ -19,10 +19,13 @@
 #include <stdint.h>
 #include <memory_info.h>
 
+/* Offset info DIMM_INFO SpdSave for start of serial number */
+#define SPD_SAVE_OFFSET_SERIAL	5
+
 /* Fill the SMBIOS memory information from FSP MEM_INFO_DATA_HOB in CBMEM.*/
 void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type,
 		u32 frequency, u8 rank_per_dimm, u8 channel_id, u8 dimm_id,
 		const char *module_part_num, size_t module_part_number_size,
-		u16 data_width);
+		const u8 *module_serial_num, u16 data_width);
 
 #endif /* _COMMON_SMBIOS_H_ */
diff --git a/src/soc/intel/icelake/romstage/romstage.c b/src/soc/intel/icelake/romstage/romstage.c
index 1a0c4ffaee..179d99cff6 100644
--- a/src/soc/intel/icelake/romstage/romstage.c
+++ b/src/soc/intel/icelake/romstage/romstage.c
@@ -96,6 +96,7 @@ static void save_dimm_info(void)
 				src_dimm->DimmId,
 				(const char *)src_dimm->ModulePartNum,
 				sizeof(src_dimm->ModulePartNum),
+				src_dimm->SpdSave + SPD_SAVE_OFFSET_SERIAL,
 				memory_info_hob->DataWidth);
 			index++;
 		}
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c
index 2f75479339..96937d651d 100644
--- a/src/soc/intel/skylake/romstage/romstage_fsp20.c
+++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c
@@ -126,6 +126,7 @@ static void save_dimm_info(void)
 				src_dimm->DimmId,
 				(const char *)src_dimm->ModulePartNum,
 				sizeof(src_dimm->ModulePartNum),
+				src_dimm->SpdSave + SPD_SAVE_OFFSET_SERIAL,
 				memory_info_hob->DataWidth);
 			index++;
 		}