soc/broadwell: Don't use device_t
Use of device_t is deprecated. Change-Id: Ifdf3d1870500812a417eaa5e93fcc168629c094f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28692 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
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@ -43,6 +43,6 @@ int pch_is_wpt(void);
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int pch_is_wpt_ulx(void);
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int pch_is_wpt_ulx(void);
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u32 pch_read_soft_strap(int id);
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u32 pch_read_soft_strap(int id);
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void pch_log_state(void);
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void pch_log_state(void);
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void pch_disable_devfn(device_t dev);
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void pch_disable_devfn(struct device *dev);
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#endif
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#endif
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@ -51,7 +51,7 @@
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#define XHCI_PLSW_ENABLE (5 << 5) /* Transition from disabled */
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#define XHCI_PLSW_ENABLE (5 << 5) /* Transition from disabled */
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#ifdef __SMM__
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#ifdef __SMM__
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void usb_xhci_sleep_prepare(device_t dev, u8 slp_typ);
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void usb_xhci_sleep_prepare(pci_devfn_t dev, u8 slp_typ);
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#endif
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#endif
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#endif
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#endif
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@ -77,7 +77,7 @@ u32 pch_read_soft_strap(int id)
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#ifndef __PRE_RAM__
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#ifndef __PRE_RAM__
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/* Put device in D3Hot Power State */
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/* Put device in D3Hot Power State */
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static void pch_enable_d3hot(device_t dev)
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static void pch_enable_d3hot(struct device *dev)
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{
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{
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u32 reg32 = pci_read_config32(dev, PCH_PCS);
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u32 reg32 = pci_read_config32(dev, PCH_PCS);
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reg32 |= PCH_PCS_PS_D3HOT;
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reg32 |= PCH_PCS_PS_D3HOT;
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@ -92,7 +92,7 @@ static void rcba_function_disable(u32 reg, u32 bit)
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}
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}
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/* Set bit in Function Disable register to hide this device */
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/* Set bit in Function Disable register to hide this device */
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void pch_disable_devfn(device_t dev)
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void pch_disable_devfn(struct device *dev)
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{
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{
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switch (dev->path.pci.devfn) {
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switch (dev->path.pci.devfn) {
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case PCH_DEVFN_ADSP: /* Audio DSP */
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case PCH_DEVFN_ADSP: /* Audio DSP */
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@ -183,7 +183,7 @@ void pch_disable_devfn(device_t dev)
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}
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}
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}
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}
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void broadwell_pch_enable_dev(device_t dev)
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void broadwell_pch_enable_dev(struct device *dev)
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{
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{
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u32 reg32;
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u32 reg32;
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@ -25,7 +25,7 @@
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#include <soc/cpu.h>
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#include <soc/cpu.h>
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#ifdef __SMM__
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#ifdef __SMM__
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static u8 *usb_xhci_mem_base(device_t dev)
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static u8 *usb_xhci_mem_base(pci_devfn_t dev)
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{
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{
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u32 mem_base = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
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u32 mem_base = pci_read_config32(dev, PCI_BASE_ADDRESS_0);
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@ -36,7 +36,7 @@ static u8 *usb_xhci_mem_base(device_t dev)
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return (u8 *)(mem_base & ~0xf);
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return (u8 *)(mem_base & ~0xf);
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}
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}
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static int usb_xhci_port_count_usb3(device_t dev)
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static int usb_xhci_port_count_usb3(pci_devfn_t dev)
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{
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{
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/* PCH-LP has 4 SS ports */
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/* PCH-LP has 4 SS ports */
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return 4;
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return 4;
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@ -69,7 +69,7 @@ static void usb_xhci_reset_port_usb3(u8 *mem_base, int port)
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* b) Poll for warm reset complete
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* b) Poll for warm reset complete
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* c) Write 1 to port change status bits
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* c) Write 1 to port change status bits
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*/
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*/
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static void usb_xhci_reset_usb3(device_t dev, int all)
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static void usb_xhci_reset_usb3(pci_devfn_t dev, int all)
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{
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{
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u32 status, port_disabled;
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u32 status, port_disabled;
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int timeout, port;
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int timeout, port;
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@ -140,7 +140,7 @@ static void usb_xhci_reset_usb3(device_t dev, int all)
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}
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}
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/* Handler for XHCI controller on entry to S3/S4/S5 */
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/* Handler for XHCI controller on entry to S3/S4/S5 */
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void usb_xhci_sleep_prepare(device_t dev, u8 slp_typ)
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void usb_xhci_sleep_prepare(pci_devfn_t dev, u8 slp_typ)
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{
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{
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u16 reg16;
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u16 reg16;
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u32 reg32;
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u32 reg32;
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