soc/amd/picasso: Add set_mmio_dev_ops() to set ops for MMIO devices
This change adds a helper function set_mmio_dev_ops() in chip.c which is used for setting the dev->ops for MMIO devices based on the comparison of MMIO address in device tree to the pre-defined base addresses in iomap.h. Call to i2c_acpi_name() is replaced with set_mmio_dev_ops and scope of i2c_acpi_name is restricted to i2c.c since it is not required to be exposed out of that file. Change-Id: I31f96cfe8267b0df37012baeb7cfcaec9c2280f6 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42067 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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@ -8,6 +8,7 @@
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#include <soc/acpi.h>
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#include <soc/acpi.h>
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#include <soc/cpu.h>
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#include <soc/cpu.h>
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#include <soc/data_fabric.h>
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#include <soc/data_fabric.h>
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#include <soc/iomap.h>
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#include <soc/pci_devs.h>
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#include <soc/pci_devs.h>
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#include <soc/southbridge.h>
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#include <soc/southbridge.h>
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#include "chip.h"
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#include "chip.h"
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@ -15,7 +16,6 @@
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/* Supplied by i2c.c */
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/* Supplied by i2c.c */
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extern struct device_operations picasso_i2c_mmio_ops;
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extern struct device_operations picasso_i2c_mmio_ops;
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extern const char *i2c_acpi_name(const struct device *dev);
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struct device_operations cpu_bus_ops = {
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struct device_operations cpu_bus_ops = {
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.read_resources = noop_read_resources,
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.read_resources = noop_read_resources,
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@ -119,6 +119,17 @@ static struct device_operations pci_ops_ops_bus_ab = {
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.acpi_fill_ssdt = acpi_device_write_pci_dev,
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.acpi_fill_ssdt = acpi_device_write_pci_dev,
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};
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};
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static void set_mmio_dev_ops(struct device *dev)
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{
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switch (dev->path.mmio.addr) {
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case APU_I2C2_BASE:
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case APU_I2C3_BASE:
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case APU_I2C4_BASE:
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dev->ops = &picasso_i2c_mmio_ops;
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break;
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}
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}
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static void enable_dev(struct device *dev)
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static void enable_dev(struct device *dev)
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{
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{
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/* Set the operations if it is a special bus type */
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/* Set the operations if it is a special bus type */
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@ -136,8 +147,7 @@ static void enable_dev(struct device *dev)
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}
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}
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sb_enable(dev);
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sb_enable(dev);
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} else if (dev->path.type == DEVICE_PATH_MMIO) {
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} else if (dev->path.type == DEVICE_PATH_MMIO) {
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if (i2c_acpi_name(dev) != NULL)
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set_mmio_dev_ops(dev);
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dev->ops = &picasso_i2c_mmio_ops;
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}
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}
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}
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}
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@ -13,9 +13,6 @@
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#include <soc/southbridge.h>
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#include <soc/southbridge.h>
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#include "chip.h"
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#include "chip.h"
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/* Global to provide access to chip.c */
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const char *i2c_acpi_name(const struct device *dev);
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/*
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/*
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* We don't have addresses for I2C0-1.
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* We don't have addresses for I2C0-1.
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*/
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*/
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@ -48,7 +45,7 @@ const struct dw_i2c_bus_config *dw_i2c_get_soc_cfg(unsigned int bus)
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return &config->i2c[bus];
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return &config->i2c[bus];
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}
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}
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const char *i2c_acpi_name(const struct device *dev)
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static const char *i2c_acpi_name(const struct device *dev)
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{
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{
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switch (dev->path.mmio.addr) {
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switch (dev->path.mmio.addr) {
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case APU_I2C2_BASE:
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case APU_I2C2_BASE:
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