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mb/google/brya/baseboard/nissa: Configure I2C lcnt and hcnt 

Configure lcnt and hcnt directly to give the required frequency, tHIGH
and tLOW, instead of using rise and fall times. Aim for a frequency of
390 kHz to make sure it doesn't exceed 400 kHz on different boards.

BUG=b:227517802
TEST=Probe the clock line and check that it meets the requirements for
frequency, tHIGH and tLOW.

Change-Id: I4d4f877c1f0cd9aacd3fa152890b7ef82e059f78
Signed-off-by: Reka Norman <rekanorman@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63562
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Reka Norman 2022-04-08 15:14:35 +10:00 committed by Felix Held
parent f478b1f464
commit 46694d8a46
1 changed files with 20 additions and 10 deletions
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30
src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
View File

@ -74,33 +74,43 @@ chip soc/intel/alderlake
.i2c[0] = {
.early_init = 1,
.speed = I2C_SPEED_FAST,
.rise_time_ns = 650,
.fall_time_ns = 400,
.data_hold_time_ns = 50,
.speed_config[0] = {
.scl_lcnt = 157,
.scl_hcnt = 78,
}
},
.i2c[1] = {
.speed = I2C_SPEED_FAST,
.rise_time_ns = 650,
.fall_time_ns = 400,
.data_hold_time_ns = 50,
.speed_config[0] = {
.scl_lcnt = 157,
.scl_hcnt = 78,
}
},
.i2c[2] = {
.speed = I2C_SPEED_FAST,
.rise_time_ns = 650,
.fall_time_ns = 400,
.data_hold_time_ns = 50,
.speed_config[0] = {
.scl_lcnt = 157,
.scl_hcnt = 78,
}
},
.i2c[3] = {
.speed = I2C_SPEED_FAST,
.rise_time_ns = 650,
.fall_time_ns = 400,
.data_hold_time_ns = 50,
.speed_config[0] = {
.scl_lcnt = 157,
.scl_hcnt = 78,
}
},
.i2c[5] = {
.speed = I2C_SPEED_FAST,
.rise_time_ns = 650,
.fall_time_ns = 400,
.data_hold_time_ns = 50,
.speed_config[0] = {
.scl_lcnt = 157,
.scl_hcnt = 78,
}
},
}"