soc/amd/cezanne/fsp_m_params: set usb_phy version and length.
Setting the usb_phy version and length in the soc code instead of devicetree. That way the devicetree code does not have to reapeat it for different AMD Cezanne based systems. Tested on guybrush by changing phy settings in devicetree and then checking the usb phy register. Signed-off-by: Julian Schroeder <julianmarcusschroeder@gmail.com> Change-Id: I2db49e095672054b9b15042fb003a93b67e3a4c9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57478 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -206,12 +206,8 @@ chip soc/amd/cezanne
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.tx_vboost_lvl_en=1,
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.tx_vboost_lvl=5,
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},
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.ComboPhyStaticConfig[0] = 0,
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.ComboPhyStaticConfig[1] = 0,
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.Version_Major = 0xd,
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.Version_Minor = 0x6,
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.TableLength = 100,
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.BatteryChargerEnable = 0,
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.PhyP3CpmP4Support = 0,
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}"
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@ -229,8 +229,12 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
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mcfg->hda_enable = devtree_hda_dev_enabled();
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mcfg->sata_enable = devtree_sata_dev_enabled();
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if (config->usb_phy_custom)
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if (config->usb_phy_custom) {
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mcfg->usb_phy = (struct usb_phy_config *)&config->usb_phy;
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mcfg->usb_phy->Version_Major = 0xd;
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mcfg->usb_phy->Version_Minor = 0x6;
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mcfg->usb_phy->TableLength = 100;
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}
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else
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mcfg->usb_phy = NULL;
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