soc/amd/cezanne/fsp_m_params: set usb_phy version and length.

Setting the usb_phy version and length in the soc code instead of devicetree.
That way the devicetree code does not have to reapeat it for different
AMD Cezanne based systems.

Tested on guybrush by changing phy settings in devicetree and then checking
the usb phy register.

Signed-off-by: Julian Schroeder <julianmarcusschroeder@gmail.com>
Change-Id: I2db49e095672054b9b15042fb003a93b67e3a4c9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57478
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Julian Schroeder 2021-09-07 14:54:19 -05:00 committed by Felix Held
parent f4a992cca7
commit 4671983401
2 changed files with 5 additions and 5 deletions

View File

@ -206,12 +206,8 @@ chip soc/amd/cezanne
.tx_vboost_lvl_en=1,
.tx_vboost_lvl=5,
},
.ComboPhyStaticConfig[0] = 0,
.ComboPhyStaticConfig[1] = 0,
.Version_Major = 0xd,
.Version_Minor = 0x6,
.TableLength = 100,
.BatteryChargerEnable = 0,
.PhyP3CpmP4Support = 0,
}"

View File

@ -229,8 +229,12 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
mcfg->hda_enable = devtree_hda_dev_enabled();
mcfg->sata_enable = devtree_sata_dev_enabled();
if (config->usb_phy_custom)
if (config->usb_phy_custom) {
mcfg->usb_phy = (struct usb_phy_config *)&config->usb_phy;
mcfg->usb_phy->Version_Major = 0xd;
mcfg->usb_phy->Version_Minor = 0x6;
mcfg->usb_phy->TableLength = 100;
}
else
mcfg->usb_phy = NULL;