timestamp,vc/google/chromeos/cr50: Add timestamp for enable update

cr50_enable_update takes a non-trivial amount of time.

TEST=Boot guybrush and dump timestamps
 553:started TPM enable update                         3,615,156 (444)
 554:finished TPM enable update                        3,632,810 (17,654)

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I522d0638a4a6ae9624965e49b47bca8743c3206c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55402
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Raul E Rangel 2021-06-10 15:46:32 -06:00 committed by Patrick Georgi
parent 2efcafa7b0
commit 4693f3dfe9
2 changed files with 10 additions and 1 deletions

View File

@ -77,6 +77,8 @@ enum timestamp_id {
TS_START_COPYVPD = 550,
TS_END_COPYVPD_RO = 551,
TS_END_COPYVPD_RW = 552,
TS_START_TPM_ENABLE_UPDATE = 553,
TS_END_TPM_ENABLE_UPDATE = 554,
/* 900-940 reserved for vendorcode extensions (900-940: AMD) */
TS_AGESA_INIT_RESET_START = 900,
@ -204,6 +206,8 @@ static const struct timestamp_id_to_name {
{ TS_END_TPMPCR, "finished TPM PCR extend" },
{ TS_START_TPMLOCK, "starting locking TPM" },
{ TS_END_TPMLOCK, "finished locking TPM" },
{ TS_START_TPM_ENABLE_UPDATE, "started TPM enable update" },
{ TS_END_TPM_ENABLE_UPDATE, "finished TPM enable update" },
{ TS_START_COPYVPD, "starting to load Chrome OS VPD" },
{ TS_END_COPYVPD_RO, "finished loading Chrome OS VPD (RO)" },

View File

@ -9,6 +9,7 @@
#include <vb2_api.h>
#include <security/vboot/vboot_common.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <timestamp.h>
#define CR50_RESET_DELAY_MS 1000
@ -89,6 +90,8 @@ static void enable_update(void *unused)
return;
}
timestamp_add_now(TS_START_TPM_ENABLE_UPDATE);
/* Reboot in 1000 ms if necessary. */
ret = tlcl_cr50_enable_update(CR50_RESET_DELAY_MS,
&num_restored_headers);
@ -115,8 +118,10 @@ static void enable_update(void *unused)
* If the Cr50 doesn't requires a reset, continue booting.
*/
cr50_reset_reqd = cr50_is_reset_needed();
if (!cr50_reset_reqd)
if (!cr50_reset_reqd) {
timestamp_add_now(TS_END_TPM_ENABLE_UPDATE);
return;
}
printk(BIOS_INFO, "Waiting for CR50 reset to enable TPM.\n");
elog_add_event(ELOG_TYPE_CR50_NEED_RESET);