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mb/prodrive/atlas: Configure PCIe device tree settings 

Add CPU & PCH PCIe configs and remove the unused devices.
Configures per Atlas schematics v6.

Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com>
Change-Id: Id3145156c4ab3ec1c2d3eb6c433108a1b1cab9e8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61296
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
This commit is contained in:
Lean Sheng Tan 2022-01-21 10:35:13 +01:00 committed by Felix Held
parent 2c1c3138bc
commit 46c9f761d4
1 changed files with 36 additions and 9 deletions
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45
src/mainboard/prodrive/atlas/devicetree.cb
View File

@ -41,29 +41,56 @@ chip soc/intel/alderlake
[PchSerialIoIndexUART2] = PchSerialIoDisabled,
}"
# Enable PCH PCIE RP 5, 6, 7, 8, 9, 10 using free running CLK (0x80)
# Clock source is shared hence marked as free running.
register "pch_pcie_rp[PCH_RP(5)]" = "{
.flags = PCIE_RP_CLK_SRC_UNUSED,
}"
register "pch_pcie_rp[PCH_RP(6)]" = "{
.flags = PCIE_RP_CLK_SRC_UNUSED,
}"
register "pch_pcie_rp[PCH_RP(7)]" = "{
.flags = PCIE_RP_CLK_SRC_UNUSED,
}"
register "pch_pcie_rp[PCH_RP(8)]" = "{
.flags = PCIE_RP_CLK_SRC_UNUSED,
}"
register "pch_pcie_rp[PCH_RP(9)]" = "{
.flags = PCIE_RP_CLK_SRC_UNUSED,
}"
register "pch_pcie_rp[PCH_RP(10)]" = "{
.flags = PCIE_RP_CLK_SRC_UNUSED,
}"
register "pcie_clk_config_flag[0]" = "PCIE_CLK_FREE_RUNNING"
register "pcie_clk_config_flag[1]" = "PCIE_CLK_FREE_RUNNING"
# Enable CPU PCIE RP 1, 2, 3 using using free running CLK (0x80)
# Clock source is shared hence marked as free running.
register "cpu_pcie_rp[CPU_RP(1)]" = "{
.flags = PCIE_RP_LTR | PCIE_RP_AER | PCIE_RP_CLK_SRC_UNUSED,
}"
register "cpu_pcie_rp[CPU_RP(2)]" = "{
.flags = PCIE_RP_LTR | PCIE_RP_AER | PCIE_RP_CLK_SRC_UNUSED,
}"
register "cpu_pcie_rp[CPU_RP(3)]" = "{
.flags = PCIE_RP_LTR | PCIE_RP_AER | PCIE_RP_CLK_SRC_UNUSED,
}"
device domain 0 on
device ref pcie5 on end
device ref igpu on end
device ref dtt on end
device ref pcie4_0 on end
device ref pcie4_1 on end
device ref tbt_pcie_rp0 on end
device ref tbt_pcie_rp1 on end
device ref tbt_pcie_rp2 on end
device ref tbt_pcie_rp3 on end
device ref crashlog off end
device ref xhci on end
device ref cnvi_wifi on end
device ref heci1 on end
device ref sata on end
device ref pcie_rp1 on end
device ref pcie_rp3 on end # W/A to FSP issue
device ref pcie_rp4 on end # W/A to FSP issue
device ref pcie_rp5 on end
device ref pcie_rp6 on end
device ref pcie_rp8 on end
device ref pcie_rp9 on end
device ref pcie_rp11 on end
device ref pcie_rp10 on end
device ref uart0 on end
device ref uart1 on end
device ref p2sb on end