util/rockchip: Port make_idb.py to python3
BUG=chromium:1023662 TEST=buildbot pass TEST=1. Use python2 script 2. Run `emerge-kevin coreboot` twice, so we get bootblock.bin.1 and bootblock.bin.2 3. Run `xxd` on these two bootblock so we get bootblock.bin.1.hex and bootblock.bin.2.hex 4. `diff bootblock.bin.1.hex bootblock.bin.2.hex` and record the difference. (at least, the time info changes) 5. Migrate to python3 6. Similar steps, we get bootblock.bin.py3.hex 7. `diff bootblock.bin.1.hex bootblock.bin.py3.hex`, the difference is similar. (time info, git hash changes) Signed-off-by: Yilin Yang <kerker@google.com> Change-Id: I04253084ec9b65310c52598b629390051cd2172b Reviewed-on: https://review.coreboot.org/c/coreboot/+/45447 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -83,7 +83,7 @@ devices on the board such as dGPU. `C`
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can be passed to SPIKE, the RISC-V reference emulator.`Bash`
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* _sifive-gpt.py_ - Wraps the bootblock in a GPT partition for
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SiFive's bootrom. `Python3`
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* __rockchip__ - Generate Rockchip idblock bootloader. `Python2`
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* __rockchip__ - Generate Rockchip idblock bootloader. `Python3`
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* __sconfig__ - coreboot device tree compiler `Lex` `Yacc`
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* __scripts__
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* _config_ - Manipulate options in a .config file from the
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@ -1 +1 @@
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Generate Rockchip idblock bootloader. `Python2`
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Generate Rockchip idblock bootloader. `Python3`
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@ -1,4 +1,4 @@
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#!/usr/bin/env python2
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#!/usr/bin/env python3
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# SPDX-License-Identifier: BSD-2-Clause
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import struct
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@ -7,7 +7,7 @@ from io import SEEK_SET, SEEK_END
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class IDBTool:
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def __init__(self):
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print "Initialize IDBTool"
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print("Initialize IDBTool")
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def p_rc4(self, buf, length):
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key = (124,78,3,4,85,5,9,7,45,44,123,56,23,13,23,17)
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@ -25,7 +25,7 @@ class IDBTool:
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j = (j + S[i]) % 256
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temp = S[i]; S[i] = S[j]; S[j] = temp
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k = (S[i] + S[j]) % 256
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buf[x] = struct.pack('B', ord(buf[x]) ^ S[k])
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buf[x] = struct.pack('B', buf[x] ^ S[k])[0]
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def makeIDB(self, chip, from_file, to_file, rc4_flag = False, align_flag = False):
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try:
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@ -45,17 +45,18 @@ class IDBTool:
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data_len = len(data)
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SECTOR_SIZE = 512
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PAGE_ALIGN = 4
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sectors = (data_len + 4 - 1) / SECTOR_SIZE + 1
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pages = (sectors - 1) / PAGE_ALIGN + 1
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sectors = pages * PAGE_ALIGN;
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sectors = (data_len + 4 - 1) // SECTOR_SIZE + 1
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pages = (sectors - 1) // PAGE_ALIGN + 1
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sectors = pages * PAGE_ALIGN
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buf = [B'\0'] * sectors * SECTOR_SIZE
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buf[:4] = chip
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buf = bytearray(sectors * SECTOR_SIZE)
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assert len(chip) == 4
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buf[:4] = chip.encode('ascii')
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buf[4 : 4+data_len] = data
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idblock = [B'\0'] * 4 * SECTOR_SIZE
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blank = [B'\0'] * 4 * SECTOR_SIZE
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idblock[:4] = ['\x55', '\xAA', '\xF0', '\x0F']
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idblock = bytearray(4 * SECTOR_SIZE)
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blank = bytearray(4 * SECTOR_SIZE)
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idblock[:4] = b'\x55\xAA\xF0\x0F'
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if (not rc4_flag):
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idblock[8:12] = struct.pack("<I", 1)
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@ -65,8 +66,8 @@ class IDBTool:
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self.p_rc4(list_tmp, SECTOR_SIZE)
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buf[SECTOR_SIZE*i : SECTOR_SIZE*(i+1)] = list_tmp
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idblock[12:16] = struct.pack("<HH", 4, 4);
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idblock[506:510] = struct.pack("<HH", sectors, sectors);
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idblock[12:16] = struct.pack("<HH", 4, 4)
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idblock[506:510] = struct.pack("<HH", sectors, sectors)
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self.p_rc4(idblock, SECTOR_SIZE)
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try:
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@ -76,25 +77,25 @@ class IDBTool:
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try:
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if (align_flag):
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fout.write(''.join(idblock))
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fout.write(''.join(blank))
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fout.write(idblock)
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fout.write(blank)
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for s in xrange(0, sectors * SECTOR_SIZE, PAGE_ALIGN * SECTOR_SIZE):
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fout.write(''.join(buf[s : s + PAGE_ALIGN * SECTOR_SIZE]))
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fout.write(''.join(blank))
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for s in range(0, sectors * SECTOR_SIZE, PAGE_ALIGN * SECTOR_SIZE):
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fout.write(buf[s : s + PAGE_ALIGN * SECTOR_SIZE])
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fout.write(blank)
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else:
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fout.write(''.join(idblock))
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fout.write(''.join(buf))
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fout.write(idblock)
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fout.write(buf)
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fout.flush()
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except:
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sys.exit("Failed to write data to : " + to_file)
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finally:
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fout.close()
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print "DONE"
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print("DONE")
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def usage():
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print "Usage: make_idb.py [--chip=RKXX] [--enable-rc4] [--enable-align] [--to=out] --from=in"
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print " --chip: default is RK32"
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print("Usage: make_idb.py [--chip=RKXX] [--enable-rc4] [--enable-align] [--to=out] --from=in")
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print(" --chip: default is RK32")
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if __name__ == '__main__':
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rc4_flag = align_flag = False
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