mb/google/dedede/var/storo:Add P-sensor for storo
Add P-sensor into devicetree for storo according to configuration information provided by the vendor. BUG=b:177392203 BRANCH=dedede TEST=built storo firmware and verified P-sensor function Change-Id: Iced4ab7d94b38ef8b1807955cbb887454accb1e8 Signed-off-by: Zanxi Chen <chenzanxi@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51016 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Evan Green <evgreen@chromium.org>
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@ -16,6 +16,7 @@ chip soc/intel/jasperlake
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#| I2C2 | Touchscreen |
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#| I2C3 | Camera |
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#| I2C4 | Audio |
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#| I2C5 | P-Sensor |
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#+-------------------+---------------------------+
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register "common_soc_config" = "{
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.gspi[0] = {
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@ -37,6 +38,18 @@ chip soc/intel/jasperlake
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.i2c[4] = {
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.speed = I2C_SPEED_FAST,
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},
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.i2c[5] = {
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.speed = I2C_SPEED_FAST,
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},
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}"
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register "SerialIoI2cMode" = "{
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[PchSerialIoIndexI2C0] = PchSerialIoPci,
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[PchSerialIoIndexI2C1] = PchSerialIoDisabled,
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[PchSerialIoIndexI2C2] = PchSerialIoPci,
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[PchSerialIoIndexI2C3] = PchSerialIoPci,
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[PchSerialIoIndexI2C4] = PchSerialIoPci,
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[PchSerialIoIndexI2C5] = PchSerialIoPci,
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}"
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device domain 0 on
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@ -189,6 +202,60 @@ chip soc/intel/jasperlake
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device i2c 29 on end
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end
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end # I2C 4
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device pci 19.1 on
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chip drivers/i2c/sx9324
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register "desc" = ""SAR Proximity Sensor""
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register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E11_IRQ)"
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register "uid" = "2"
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register "reg_gnrl_ctrl0" = "0x0a"
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register "reg_gnrl_ctrl1" = "0x22"
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register "reg_afe_ctrl0" = "0x20"
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register "reg_afe_ctrl3" = "0x00"
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register "reg_afe_ctrl4" = "0x47"
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register "reg_afe_ctrl6" = "0x00"
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register "reg_afe_ctrl7" = "0x47"
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register "reg_afe_ctrl8" = "0x12"
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register "reg_afe_ctrl9" = "0x08"
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register "reg_afe_ph0" = "0x37"
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#register "reg_afe_ph1" = "0x10"
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register "reg_afe_ph1" = "0x37"
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register "reg_afe_ph2" = "0x1f"
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register "reg_afe_ph3" = "0x3d"
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register "reg_prox_ctrl0" = "0x0b"
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register "reg_prox_ctrl1" = "0x0b"
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register "reg_prox_ctrl2" = "0x20"
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register "reg_prox_ctrl3" = "0x20"
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register "reg_prox_ctrl4" = "0x0c"
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register "reg_prox_ctrl5" = "0x00"
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register "reg_prox_ctrl6" = "0x1c"
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register "reg_prox_ctrl7" = "0xc0"
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register "reg_adv_ctrl0" = "0x00"
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register "reg_adv_ctrl1" = "0x00"
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register "reg_adv_ctrl2" = "0x00"
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register "reg_adv_ctrl3" = "0x00"
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register "reg_adv_ctrl4" = "0x00"
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register "reg_adv_ctrl5" = "0x05"
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register "reg_adv_ctrl6" = "0x00"
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register "reg_adv_ctrl7" = "0x00"
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register "reg_adv_ctrl8" = "0x00"
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register "reg_adv_ctrl9" = "0x00"
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register "reg_adv_ctrl10" = "0x00"
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register "reg_adv_ctrl11" = "0x00"
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register "reg_adv_ctrl12" = "0x00"
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register "reg_adv_ctrl13" = "0x00"
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register "reg_adv_ctrl14" = "0x80"
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register "reg_adv_ctrl15" = "0x0c"
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register "reg_adv_ctrl16" = "0x04"
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register "reg_adv_ctrl17" = "0x70"
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register "reg_adv_ctrl18" = "0x20"
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register "reg_adv_ctrl19" = "0x00"
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register "reg_adv_ctrl20" = "0x00"
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register "reg_irq_cfg0" = "0x00"
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register "reg_irq_cfg1" = "0x80"
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register "reg_irq_cfg2" = "0x01"
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device i2c 28 on end
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end
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end # I2C 5
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device pci 1f.3 on end # Intel HDA
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end
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end
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