mb/google/rex: Add memory configuration board straps
This patch reads various memory configuration GPIOs to fill in below details: 1. variant_memory_sku() 2. variant_is_half_populated() BUG=b:224325352 TEST=Able to build Google/Rex. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I23bad8c78523cb56008e6d67e7776e57e42fbeb9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66041 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
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2 changed files with 15 additions and 2 deletions
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@ -17,5 +17,11 @@
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#define EC_SCI_GPI GPE0_ESPI
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/* EC wake is LAN_WAKE# which is a special DeepSX wake pin */
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#define GPE_EC_WAKE GPE0_LAN_WAK
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/* Memory configuration board straps */
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#define GPIO_MEM_CONFIG_0 GPP_E11
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#define GPIO_MEM_CONFIG_1 GPP_E02
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#define GPIO_MEM_CONFIG_2 GPP_E01
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#define GPIO_MEM_CONFIG_3 GPP_E12
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#define GPIO_MEM_CH_SEL GPP_E13
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#endif /* __BASEBOARD_GPIO_H__ */
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@ -17,12 +17,19 @@ const struct mb_cfg *__weak variant_memory_params(void)
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int __weak variant_memory_sku(void)
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{
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return 0;
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gpio_t spd_gpios[] = {
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GPIO_MEM_CONFIG_0,
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GPIO_MEM_CONFIG_1,
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GPIO_MEM_CONFIG_2,
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GPIO_MEM_CONFIG_3,
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};
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return gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios));
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}
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bool __weak variant_is_half_populated(void)
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{
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return 0;
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return gpio_get(GPIO_MEM_CH_SEL);
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}
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void __weak variant_get_spd_info(struct mem_spd *spd_info)
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