soc/amd/common/block/spi: Pretty print SPI status
I find it difficult to constantly decode the registers when reading them. Let's print out something that's easier to parse. BUG=b:228289365 TEST=boot guybrush and see status codes printed Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I6c9d98cf43f340cf50e12c93b4c35187de9bb750 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63938 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rob Barnes <robbarnes@google.com> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -39,6 +39,7 @@ static void dump_state(enum spi_dump_state_phase phase)
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{
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u8 dump_size;
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uintptr_t addr;
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u32 status;
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if (!CONFIG(SOC_AMD_COMMON_BLOCK_SPI_DEBUG))
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return;
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@ -55,7 +56,17 @@ static void dump_state(enum spi_dump_state_phase phase)
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}
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printk(BIOS_DEBUG, "Cntrl0: %x\n", spi_read32(SPI_CNTRL0));
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printk(BIOS_DEBUG, "Status: %x\n", spi_read32(SPI_STATUS));
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status = spi_read32(SPI_STATUS);
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printk(BIOS_DEBUG, "Status: %x\n", status);
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printk(BIOS_DEBUG,
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" Busy: %u, FIFO Read Pointer: %u, FIFO Write Pointer: %u, Done Bytes: %u\n",
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!!(status & SPI_BUSY),
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(status >> SPI_FIFO_RD_PTR_SHIFT) & SPI_FIFO_RD_PTR_MASK,
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(status >> SPI_FIFO_WR_PTR_SHIFT) & SPI_FIFO_WR_PTR_MASK,
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(status >> SPI_DONE_BYTE_COUNT_SHIFT) & SPI_DONE_BYTE_COUNT_MASK);
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printk(BIOS_DEBUG, "CmdCode: %x\n", spi_read8(SPI_CMD_CODE));
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addr = spi_get_bar() + SPI_FIFO;
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@ -63,7 +74,6 @@ static void dump_state(enum spi_dump_state_phase phase)
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case SPI_DUMP_STATE_BEFORE_CMD:
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dump_size = spi_read8(SPI_TX_BYTE_COUNT);
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printk(BIOS_DEBUG, "TxByteCount: %x\n", dump_size);
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printk(BIOS_DEBUG, "CmdCode: %x\n", spi_read8(SPI_CMD_CODE));
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break;
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case SPI_DUMP_STATE_AFTER_CMD:
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dump_size = spi_read8(SPI_RX_BYTE_COUNT);
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