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intetool: Add support for 700 series PCH 

The change does the following:

- adds PCH IDs for 700 series chipsets per the DOC# 619362 rev 2.2
- updates GPIO table for PCH-S per the DOC# 618659 rev 2.1
- enables dumping GPIOs for 700 series PCH

Change-Id: I4509ad714772ce90cdee5135227c02640acb6085
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75873
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
This commit is contained in:
Michał Żygowski 2023-06-16 12:49:12 +02:00 committed by Felix Held
parent 8c1154dc61
commit 472d83bb0a
6 changed files with 51 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
util/inteltool/gpio.c
View File

@ -1109,11 +1109,16 @@ int print_gpios(struct pci_dev *sb, int show_all, int show_diffs)
case PCI_DEVICE_ID_INTEL_Q670:
case PCI_DEVICE_ID_INTEL_Z690:
case PCI_DEVICE_ID_INTEL_W680:
case PCI_DEVICE_ID_INTEL_W685:
case PCI_DEVICE_ID_INTEL_WM690:
case PCI_DEVICE_ID_INTEL_HM670:
case PCI_DEVICE_ID_INTEL_WM790:
case PCI_DEVICE_ID_INTEL_W790:
case PCI_DEVICE_ID_INTEL_Z790:
case PCI_DEVICE_ID_INTEL_H770:
case PCI_DEVICE_ID_INTEL_B760:
case PCI_DEVICE_ID_INTEL_HM770:
case PCI_DEVICE_ID_INTEL_WM790:
case PCI_DEVICE_ID_INTEL_C262:
case PCI_DEVICE_ID_INTEL_C266:
case PCI_DEVICE_ID_INTEL_ADL_P:
case PCI_DEVICE_ID_INTEL_ADL_M:
case PCI_DEVICE_ID_INTEL_RPL_P:

9
util/inteltool/gpio_groups.c
View File

@ -222,11 +222,16 @@ const struct gpio_community *const *get_gpio_communities(struct pci_dev *const s
case PCI_DEVICE_ID_INTEL_Q670:
case PCI_DEVICE_ID_INTEL_Z690:
case PCI_DEVICE_ID_INTEL_W680:
case PCI_DEVICE_ID_INTEL_W685:
case PCI_DEVICE_ID_INTEL_WM690:
case PCI_DEVICE_ID_INTEL_HM670:
case PCI_DEVICE_ID_INTEL_WM790:
case PCI_DEVICE_ID_INTEL_W790:
case PCI_DEVICE_ID_INTEL_Z790:
case PCI_DEVICE_ID_INTEL_H770:
case PCI_DEVICE_ID_INTEL_B760:
case PCI_DEVICE_ID_INTEL_HM770:
case PCI_DEVICE_ID_INTEL_WM790:
case PCI_DEVICE_ID_INTEL_C262:
case PCI_DEVICE_ID_INTEL_C266:
*community_count = ARRAY_SIZE(alderlake_pch_h_communities);
*pad_stepping = 16;
return alderlake_pch_h_communities;

24
util/inteltool/gpio_names/alderlake_h.h
View File

@ -105,10 +105,10 @@ const char *const alderlake_pch_h_group_d_names[] = {
"GPP_D2", "SRCCLKREQ2#", "n/a", "n/a", "n/a", "n/a", "USB_C_GPP_D2",
"GPP_D3", "SRCCLKREQ3#", "n/a", "n/a", "n/a", "n/a", "USB_C_GPP_D3",
"GPP_D4", "SML1CLK", "n/a", "n/a", "n/a", "n/a", "USB_C_GPP_D4",
"GPP_D5", "n/a", "CNV_RF_RESET#", "n/a", "n/a", "n/a", "USB_C_GPP_D5",
"GPP_D6", "n/a", "n/a", "MODEM_CLKREQ", "n/a", "n/a", "USB_C_GPP_D6",
"GPP_D7", "n/a", "n/a", "n/a", "n/a", "n/a", "USB_C_GPP_D7",
"GPP_D8", "n/a", "n/a", "n/a", "n/a", "n/a", "USB_C_GPP_D8",
"GPP_D5", "I2S2_SFRM", "CNV_RF_RESET#", "n/a", "n/a", "n/a", "USB_C_GPP_D5",
"GPP_D6", "I2S2_TXD", "n/a", "MODEM_CLKREQ", "n/a", "n/a", "USB_C_GPP_D6",
"GPP_D7", "I2S2_RXD", "n/a", "n/a", "n/a", "n/a", "USB_C_GPP_D7",
"GPP_D8", "I2S2_SCLK", "n/a", "n/a", "n/a", "n/a", "USB_C_GPP_D8",
"GPP_D9", "SML0CLK", "n/a", "n/a", "n/a", "n/a", "USB_C_GPP_D9",
"GPP_D10", "SML0DATA", "n/a", "n/a", "n/a", "n/a", "USB_C_GPP_D10",
"GPP_D11", "SRCCLKREQ4#", "n/a", "n/a", "n/a", "n/a", "USB_C_GPP_D11",
@ -339,15 +339,15 @@ const struct gpio_group alderlake_pch_h_group_k = {
};
const char *const alderlake_pch_h_group_r_names[] = {
"GPP_R0", "HDA_BCLK", "n/a", "n/a", "HDACPU_BCLK", "n/a", "USB_C_GPP_R0",
"GPP_R1", "HDA_SYNC", "n/a", "n/a", "n/a", "n/a", "USB_C_GPP_R1",
"GPP_R2", "HDA_SDO", "n/a", "n/a", "HDACPU_SDO", "n/a", "USB_C_GPP_R2",
"GPP_R3", "HDA_SDI0", "n/a", "n/a", "HDACPU_SDI", "n/a", "USB_C_GPP_R3",
"GPP_R0", "HDA_BCLK", "I2S0_SCLK", "n/a", "HDACPU_BCLK", "n/a", "USB_C_GPP_R0",
"GPP_R1", "HDA_SYNC", "I2S0_SFRM", "n/a", "n/a", "n/a", "USB_C_GPP_R1",
"GPP_R2", "HDA_SDO", "I2S0_TXD", "n/a", "HDACPU_SDO", "n/a", "USB_C_GPP_R2",
"GPP_R3", "HDA_SDI0", "I2S0_RXD", "n/a", "HDACPU_SDI", "n/a", "USB_C_GPP_R3",
"GPP_R4", "HDA_RST#", "n/a", "n/a", "n/a", "n/a", "USB_C_GPP_R4",
"GPP_R5", "HDA_SDI1", "n/a", "n/a", "n/a", "n/a", "USB_C_GPP_R5",
"GPP_R6", "n/a", "n/a", "n/a", "n/a", "n/a", "USB_C_GPP_R6",
"GPP_R7", "n/a", "n/a", "n/a", "n/a", "n/a", "USB_C_GPP_R7",
"GPP_R8", "n/a", "n/a", "n/a", "n/a", "n/a", "USB_C_GPP_R8",
"GPP_R5", "HDA_SDI1", "I2S1_RXD", "n/a", "n/a", "n/a", "USB_C_GPP_R5",
"GPP_R6", "n/a", "I2S1_TXD", "n/a", "n/a", "n/a", "USB_C_GPP_R6",
"GPP_R7", "n/a", "I2S1_SFRM", "n/a", "n/a", "n/a", "USB_C_GPP_R7",
"GPP_R8", "n/a", "I2S1_SCLK", "n/a", "n/a", "n/a", "USB_C_GPP_R8",
"GPP_R9", "DDSP_HPDA", "DISP_MISCA", "n/a", "n/a", "n/a", "USB_C_GPP_R9",
"GPP_R10", "DDSP_HPDB", "DISP_MISCB", "n/a", "n/a", "n/a", "USB_C_GPP_R10",
"GPP_R11", "DDSP_HPDC", "DISP_MISCC", "n/a", "n/a", "n/a", "USB_C_GPP_R11",

9
util/inteltool/inteltool.c
View File

@ -402,11 +402,16 @@ static const struct {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_Q670, "Q670" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_Z690, "Z690" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_W680, "W680" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_W685, "W685" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WM690, "WM690" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HM670, "HM670" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WM790, "WM790" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_W790, "W790" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_Z790, "Z790" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_H770, "H770" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_B760, "B760" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HM770, "HM770" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WM790, "WM790" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_C262, "C262" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_C266, "C266" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EHL, "Elkhart Lake" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_JSL, "Jasper Lake" },

16
util/inteltool/inteltool.h
View File

@ -227,20 +227,26 @@ static inline uint32_t inl(unsigned port)
#define PCI_DEVICE_ID_INTEL_C256 0x438d
#define PCI_DEVICE_ID_INTEL_W580 0x438f
#define PCI_DEVICE_ID_INTEL_H610E 0x7a92
#define PCI_DEVICE_ID_INTEL_Q670E 0x7a91
#define PCI_DEVICE_ID_INTEL_R680E 0x7a90
#define PCI_DEVICE_ID_INTEL_H610 0x7a87
#define PCI_DEVICE_ID_INTEL_B660 0x7a86
#define PCI_DEVICE_ID_INTEL_H670 0x7a85
#define PCI_DEVICE_ID_INTEL_Q670 0x7a83
#define PCI_DEVICE_ID_INTEL_Z690 0x7a84
#define PCI_DEVICE_ID_INTEL_W680 0x7a88
#define PCI_DEVICE_ID_INTEL_W685 0x7a8a
#define PCI_DEVICE_ID_INTEL_WM690 0x7a8d
#define PCI_DEVICE_ID_INTEL_HM670 0x7a8c
#define PCI_DEVICE_ID_INTEL_WM790 0x7a0d
#define PCI_DEVICE_ID_INTEL_R680E 0x7a90
#define PCI_DEVICE_ID_INTEL_Q670E 0x7a91
#define PCI_DEVICE_ID_INTEL_H610E 0x7a92
#define PCI_DEVICE_ID_INTEL_W790 0x7a8a
#define PCI_DEVICE_ID_INTEL_Z790 0x7a04
#define PCI_DEVICE_ID_INTEL_H770 0x7a05
#define PCI_DEVICE_ID_INTEL_B760 0x7a06
#define PCI_DEVICE_ID_INTEL_HM770 0x7a0c
#define PCI_DEVICE_ID_INTEL_WM790 0x7a0d
#define PCI_DEVICE_ID_INTEL_C262 0x7a14
#define PCI_DEVICE_ID_INTEL_C266 0x7a13
#define PCI_DEVICE_ID_INTEL_82810 0x7120
#define PCI_DEVICE_ID_INTEL_82810_DC 0x7122

9
util/inteltool/pcr.c
View File

@ -168,11 +168,16 @@ void pcr_init(struct pci_dev *const sb)
case PCI_DEVICE_ID_INTEL_Q670:
case PCI_DEVICE_ID_INTEL_Z690:
case PCI_DEVICE_ID_INTEL_W680:
case PCI_DEVICE_ID_INTEL_W685:
case PCI_DEVICE_ID_INTEL_WM690:
case PCI_DEVICE_ID_INTEL_HM670:
case PCI_DEVICE_ID_INTEL_WM790:
case PCI_DEVICE_ID_INTEL_W790:
case PCI_DEVICE_ID_INTEL_Z790:
case PCI_DEVICE_ID_INTEL_H770:
case PCI_DEVICE_ID_INTEL_B760:
case PCI_DEVICE_ID_INTEL_HM770:
case PCI_DEVICE_ID_INTEL_WM790:
case PCI_DEVICE_ID_INTEL_C262:
case PCI_DEVICE_ID_INTEL_C266:
sbbar_phys = 0xe0000000;
use_p2sb = false;
break;