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This patch cleans up mpspec.h and allows it to be included when 

HAVE_MP_TABLE=0

It also removes the artifacts from the Asus m2v-mx_se that were
necessary before the change.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4120 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Myles Watson 2009-04-15 21:25:21 +00:00
parent 4e006407ec
commit 472f3ffcf8
3 changed files with 1 additions and 17 deletions
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13
src/arch/i386/include/arch/smp/mpspec.h
View File

@ -1,8 +1,6 @@
#ifndef __ASM_MPSPEC_H #ifndef __ASM_MPSPEC_H
#define __ASM_MPSPEC_H #define __ASM_MPSPEC_H
#if HAVE_MP_TABLE==1
/* /*
* Structure definitions for SMP machines following the * Structure definitions for SMP machines following the
* Intel Multiprocessing Specification 1.1 and 1.4. * Intel Multiprocessing Specification 1.1 and 1.4.
@ -272,16 +270,5 @@ void *smp_write_floating_table_physaddr(unsigned long addr,
unsigned long mpf_physptr); unsigned long mpf_physptr);
unsigned long write_smp_table(unsigned long addr); unsigned long write_smp_table(unsigned long addr);
#else /* HAVE_MP_TABLE */
#if 0
static inline
unsigned long write_smp_table(unsigned long addr)
{
return addr;
}
#endif
#define write_smp_table(addr) (addr)
#endif /* HAVE_MP_TABLE */
#endif #endif

3
src/mainboard/asus/m2v-mx_se/Config.lb
View File

@ -51,9 +51,6 @@ if HAVE_ACPI_TABLES
end end
object ./dsdt.o object ./dsdt.o
end end
if HAVE_MP_TABLE object mptable.o end
if HAVE_PIRQ_TABLE object irq_tables.o end
# object reset.o
if CONFIG_USE_INIT if CONFIG_USE_INIT
makerule ./cache_as_ram_auto.o makerule ./cache_as_ram_auto.o

2
src/mainboard/asus/m2v-mx_se/Options.lb
View File

@ -103,7 +103,7 @@ default HAVE_FALLBACK_BOOT = 1
default HAVE_HARD_RESET = 1 default HAVE_HARD_RESET = 1
default HAVE_PIRQ_TABLE = 0 default HAVE_PIRQ_TABLE = 0
default IRQ_SLOT_COUNT = 11 # FIXME? default IRQ_SLOT_COUNT = 11 # FIXME?
default HAVE_MP_TABLE = 1 default HAVE_MP_TABLE = 0
default HAVE_OPTION_TABLE = 0 # FIXME default HAVE_OPTION_TABLE = 0 # FIXME
# Move the default coreboot CMOS range off of AMD RTC registers. # Move the default coreboot CMOS range off of AMD RTC registers.
default LB_CKS_RANGE_START = 49 default LB_CKS_RANGE_START = 49