soc/amd/picasso: add dptc support
add dptc support for different power parameter on tablet/clamshell mode The BIOS may choose to adjust power and/or thermal parameters at its own discretion. The DPTC interface(DPTCi) ALIB Function adds flexibility by allowing the BIOS to request power state changes independently of specific events. BUG=b:157943445 BRANCH=none TEST=Build.Generated ASL code from SSDT by acipgen_dptci().check the setting changed. Signed-off-by: Chris Wang <chris.wang@amd.corp-partner.google.com> Change-Id: Icae94103f254f8fdb84e6ee0f5404fb09fa97b2d Reviewed-on: https://review.coreboot.org/c/coreboot/+/43408 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -90,6 +90,14 @@ struct soc_amd_picasso_config {
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uint32_t stapm_time_constant;
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uint32_t sustained_power_limit;
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/* Enable dptc for tablet mode (0 = disable, 1 = enable) */
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uint8_t dptc_enable;
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/* STAPM Configuration for tablet mode (need enable dptc_enable first) */
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uint32_t fast_ppt_limit_tablet_mode;
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uint32_t slow_ppt_limit_tablet_mode;
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uint32_t sustained_power_limit_tablet_mode;
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/* PROCHOT_L de-assertion Ramp Time */
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uint32_t prochot_l_deassertion_ramp_time;
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@ -13,7 +13,44 @@
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#include <stdint.h>
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#include <soc/memmap.h>
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#include <soc/iomap.h>
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#include "chip.h"
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enum {
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ALIB_DPTCI_FUNCTION_ID = 0xc,
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SUSTAINED_POWER_LIMIT_PARAM_ID = 0x5,
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FAST_PPT_LIMIT_PARAM_ID = 0x6,
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SLOW_PPT_LIMIT_PARAM_ID = 0x7,
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DPTC_TOTAL_UPDATE_PARAMS = 3,
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};
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struct dptc_param {
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uint8_t id;
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uint32_t value;
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} __packed;
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struct dptc_input {
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uint16_t size;
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struct dptc_param params[DPTC_TOTAL_UPDATE_PARAMS];
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} __packed;
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#define DPTC_INPUTS(_sustained, _fast, _slow) \
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{ \
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.size = sizeof(struct dptc_input), \
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.params = { \
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{ \
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.id = SUSTAINED_POWER_LIMIT_PARAM_ID, \
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.value = _sustained, \
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}, \
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{ \
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.id = FAST_PPT_LIMIT_PARAM_ID, \
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.value = _fast, \
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}, \
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{ \
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.id = SLOW_PPT_LIMIT_PARAM_ID, \
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.value = _slow, \
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}, \
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}, \
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}
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/*
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*
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* +--------------------------------+
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@ -139,6 +176,57 @@ static void read_resources(struct device *dev)
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gnb_apic->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
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}
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static void dptc_call_alib(const char *buf_name, uint8_t *buffer, size_t size)
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{
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/* Name (buf_name, Buffer(size) {...} */
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acpigen_write_name(buf_name);
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acpigen_write_byte_buffer(buffer, size);
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/* \_SB.ALIB(0xc, buf_name) */
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acpigen_emit_namestring("\\_SB.ALIB");
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acpigen_write_integer(ALIB_DPTCI_FUNCTION_ID);
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acpigen_emit_namestring(buf_name);
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}
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static void acipgen_dptci(void)
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{
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const config_t *config = config_of_soc();
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if (!config->dptc_enable)
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return;
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struct dptc_input default_input = DPTC_INPUTS(config->sustained_power_limit,
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config->fast_ppt_limit,
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config->slow_ppt_limit);
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struct dptc_input tablet_mode_input = DPTC_INPUTS(
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config->sustained_power_limit_tablet_mode,
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config->fast_ppt_limit_tablet_mode,
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config->slow_ppt_limit_tablet_mode);
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/* Scope (\_SB) */
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acpigen_write_scope("\\_SB");
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/* Method(DPTC, 0, Serialized) */
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acpigen_write_method_serialized("DPTC", 0);
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/* If (LEqual ("\_SB.PCI0.LPCB.EC0.TBMD", 1)) */
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acpigen_write_if_lequal_namestr_int("\\_SB.PCI0.LPCB.EC0.TBMD", 1);
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dptc_call_alib("TABB", (uint8_t *)(void *)&tablet_mode_input,
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sizeof(tablet_mode_input));
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acpigen_pop_len(); /* If */
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/* Else */
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acpigen_write_else();
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dptc_call_alib("DEFB", (uint8_t *)(void *)&default_input, sizeof(default_input));
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acpigen_pop_len(); /* Else */
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acpigen_pop_len(); /* Method DPTC */
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acpigen_pop_len(); /* Scope \_SB */
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}
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/* Used by \_SB.PCI0._CRS */
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static void root_complex_fill_ssdt(const struct device *device)
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{
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@ -164,6 +252,7 @@ static void root_complex_fill_ssdt(const struct device *device)
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*/
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acpigen_write_name_dword("TOM2", (msr.hi << 12) | msr.lo >> 20);
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acpigen_pop_len();
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acipgen_dptci();
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}
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static struct device_operations root_complex_operations = {
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