google/rambi: add explicit pull-down for ram-id
Some variants need the internal pull resistor on GPIO_SSUS_40 set explicitly to pull down rather than disabling the pull, in order for the ram-id to be read correctly via GPIO. Correct this by adding a function to enable and set the internal pull and define its use as needed in the board's variant.h. Chromium source: branch: firmware-gnawty-5216.239.B /src/soc/intel/baytrail/baytrail/gpio.h#418 /src/mainboard/google/gnawty/romstage.c#60 Test: boot 4GB Candy board and observe correct RAM id, amount detected Change-Id: I8823c27385f4422184b5afa57f6048f7ff2a25ab Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/18309 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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@ -32,7 +32,10 @@ static void *get_spd_pointer(char *spd_file_content, int total_spds, int *dual)
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ssus_disable_internal_pull(GPIO_SSUS_37_PAD);
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ssus_disable_internal_pull(GPIO_SSUS_37_PAD);
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ssus_disable_internal_pull(GPIO_SSUS_38_PAD);
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ssus_disable_internal_pull(GPIO_SSUS_38_PAD);
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ssus_disable_internal_pull(GPIO_SSUS_39_PAD);
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ssus_disable_internal_pull(GPIO_SSUS_39_PAD);
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#ifdef GPIO_SSUS_40_PAD
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#ifdef GPIO_SSUS_40_PAD_USE_PULLDOWN
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/* To prevent floating pin on shipped systems. */
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ssus_enable_internal_pull(GPIO_SSUS_40_PAD, PAD_PULL_DOWN | PAD_PU_20K);
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#elif defined (GPIO_SSUS_40_PAD)
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ssus_disable_internal_pull(GPIO_SSUS_40_PAD);
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ssus_disable_internal_pull(GPIO_SSUS_40_PAD);
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#endif
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#endif
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ram_id |= (ssus_get_gpio(GPIO_SSUS_37_PAD) << 0);
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ram_id |= (ssus_get_gpio(GPIO_SSUS_37_PAD) << 0);
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@ -38,5 +38,6 @@ static const uint32_t dual_channel_config =
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#define GPIO_SSUS_38_PAD 50
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#define GPIO_SSUS_38_PAD 50
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#define GPIO_SSUS_39_PAD 58
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#define GPIO_SSUS_39_PAD 58
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#define GPIO_SSUS_40_PAD 52
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#define GPIO_SSUS_40_PAD 52
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#define GPIO_SSUS_40_PAD_USE_PULLDOWN
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#endif
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#endif
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@ -38,5 +38,6 @@ static const uint32_t dual_channel_config =
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#define GPIO_SSUS_38_PAD 50
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#define GPIO_SSUS_38_PAD 50
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#define GPIO_SSUS_39_PAD 58
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#define GPIO_SSUS_39_PAD 58
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#define GPIO_SSUS_40_PAD 52
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#define GPIO_SSUS_40_PAD 52
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#define GPIO_SSUS_40_PAD_USE_PULLDOWN
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#endif
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#endif
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@ -33,5 +33,7 @@ static const uint32_t dual_channel_config =
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#define GPIO_SSUS_37_PAD 57
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#define GPIO_SSUS_37_PAD 57
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#define GPIO_SSUS_38_PAD 50
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#define GPIO_SSUS_38_PAD 50
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#define GPIO_SSUS_39_PAD 58
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#define GPIO_SSUS_39_PAD 58
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#define GPIO_SSUS_40_PAD 52
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#define GPIO_SSUS_40_PAD_USE_PULLDOWN
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#endif
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#endif
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@ -454,4 +454,11 @@ static inline void ssus_disable_internal_pull(int pad)
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write32(ssus_pconf0(pad), read32(ssus_pconf0(pad)) & pull_mask);
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write32(ssus_pconf0(pad), read32(ssus_pconf0(pad)) & pull_mask);
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}
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}
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static inline void ssus_enable_internal_pull(int pad, int mask)
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{
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const int pull_mask = ~(0xf << 7);
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write32(ssus_pconf0(pad),
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(read32(ssus_pconf0(pad)) & pull_mask) | mask);
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}
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#endif /* _BAYTRAIL_GPIO_H_ */
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#endif /* _BAYTRAIL_GPIO_H_ */
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