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coreboot-kgpe-d16
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via: Write »access« without »m« at end 

The comment was copied around so fix all occurrences using the following
command.

	$ git grep -l accessm | xargs sed -i 's/accessm/access/g'

Change-Id: I46e117c126c0f851cd5e95cf9e42a77ca5f80996
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/4577
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Paul Menzel 2013-12-27 15:21:58 +01:00 committed by Patrick Georgi
parent ba6c2663ed
commit 475e1b9095
4 changed files with 5 additions and 5 deletions
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2
src/mainboard/via/epia-m700/romstage.c
View File

@ -67,7 +67,7 @@ static int acpi_is_wakeup_early_via_vx800(void)
/* Set ACPI base address to I/O VX800_ACPI_IO_BASE. */
pci_write_config16(dev, 0x88, VX800_ACPI_IO_BASE | 0x1);
/* Enable ACPI accessm RTC signal gated with PSON. */
/* Enable ACPI access RTC signal gated with PSON. */
pci_write_config8(dev, 0x81, 0x84);
tmp = inw(VX800_ACPI_IO_BASE + 0x04);

2
src/northbridge/via/vx800/examples/romstage.c
View File

@ -54,7 +54,7 @@ static int acpi_is_wakeup_early_via_vx800(void)
/* Set ACPI base address to I/O VX800_ACPI_IO_BASE. */
pci_write_config16(dev, 0x88, VX800_ACPI_IO_BASE | 0x1);
/* Enable ACPI accessm RTC signal gated with PSON. */
/* Enable ACPI access RTC signal gated with PSON. */
pci_write_config8(dev, 0x81, 0x84);
tmp = inw(VX800_ACPI_IO_BASE + 0x04);

4
src/southbridge/via/vt8237r/early_smbus.c
View File

@ -274,7 +274,7 @@ void vt8237_sb_enable_fid_vid(void)
/* Set ACPI base address to I/O VT8237R_ACPI_IO_BASE. */
pci_write_config16(dev, 0x88, VT8237R_ACPI_IO_BASE | 0x1);
/* Enable ACPI accessm RTC signal gated with PSON. */
/* Enable ACPI access RTC signal gated with PSON. */
pci_write_config8(dev, 0x81, 0x84);
/* chipset-specific parts */
@ -342,7 +342,7 @@ static int acpi_is_wakeup_early(void) {
/* Set ACPI base address to I/O VT8237R_ACPI_IO_BASE. */
pci_write_config16(dev, 0x88, VT8237R_ACPI_IO_BASE | 0x1);
/* Enable ACPI accessm RTC signal gated with PSON. */
/* Enable ACPI access RTC signal gated with PSON. */
pci_write_config8(dev, 0x81, 0x84);
tmp = inw(VT8237R_ACPI_IO_BASE + 0x04);

2
src/southbridge/via/vt8237r/lpc.c
View File

@ -215,7 +215,7 @@ static void setup_pm(device_t dev)
/* Disable GP3 timer. */
pci_write_config8(dev, 0x98, 0);
/* Enable ACPI accessm RTC signal gated with PSON. */
/* Enable ACPI access RTC signal gated with PSON. */
pci_write_config8(dev, 0x81, 0x84);
/* Clear status events. */