diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index d3a28413a8..91129e921d 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -106,6 +106,10 @@ config PSP_APOB_DRAM_ADDRESS Location in DRAM where the PSP will copy the AGESA PSP Output Block. +config PSP_APOB_DRAM_SIZE + hex + default 0x10000 + config PSP_SHAREDMEM_BASE hex default 0x2011000 if VBOOT diff --git a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld index 4c2a740048..d9b29bf5c2 100644 --- a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld +++ b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld @@ -62,7 +62,7 @@ BOOTBLOCK_ADDR = BOOTBLOCK_END - CONFIG_C_ENV_BOOTBLOCK_SIZE; * +--------------------------------+ PSP_SHAREDMEM_BASE + 0x40 * | Transfer Info Structure | * +--------------------------------+ PSP_SHAREDMEM_BASE - * | APOB (64KiB) | + * | APOB (PSP_APOB_DRAM_SIZE) | * +--------------------------------+ PSP_APOB_DRAM_ADDRESS * | Early BSP stack | * | (EARLYRAM_BSP_STACK_SIZE) | @@ -83,7 +83,7 @@ SECTIONS EARLY_RESERVED_DRAM_START(CONFIG_EARLY_RESERVED_DRAM_BASE) EARLYRAM_STACK(., CONFIG_EARLYRAM_BSP_STACK_SIZE) - REGION(apob, CONFIG_PSP_APOB_DRAM_ADDRESS, 64K, 1) + REGION(apob, CONFIG_PSP_APOB_DRAM_ADDRESS, CONFIG_PSP_APOB_DRAM_SIZE, 1) #if CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) PSP_SHAREDMEM_DRAM_START(CONFIG_PSP_SHAREDMEM_BASE) diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 2a056a2452..30ca13237c 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -117,6 +117,10 @@ config PSP_APOB_DRAM_ADDRESS Location in DRAM where the PSP will copy the AGESA PSP Output Block. +config PSP_APOB_DRAM_SIZE + hex + default 0x10000 + config PSP_SHAREDMEM_BASE hex default 0x2011000 if VBOOT diff --git a/src/soc/amd/sabrina/Kconfig b/src/soc/amd/sabrina/Kconfig index 654c6e3935..48d61be038 100644 --- a/src/soc/amd/sabrina/Kconfig +++ b/src/soc/amd/sabrina/Kconfig @@ -123,9 +123,13 @@ config PSP_APOB_DRAM_ADDRESS Location in DRAM where the PSP will copy the AGESA PSP Output Block. +config PSP_APOB_DRAM_SIZE + hex + default 0x20000 + config PSP_SHAREDMEM_BASE hex - default 0x2011000 if VBOOT + default 0x2021000 if VBOOT default 0x0 help This variable defines the base address in DRAM memory where PSP copies diff --git a/src/soc/amd/sabrina/root_complex.c b/src/soc/amd/sabrina/root_complex.c index 76ed7650e8..c911106e6b 100644 --- a/src/soc/amd/sabrina/root_complex.c +++ b/src/soc/amd/sabrina/root_complex.c @@ -88,7 +88,7 @@ struct dptc_input { * | PSP shared (vboot workbuf) | * | (PSP_SHAREDMEM_SIZE) | * +--------------------------------+ PSP_SHAREDMEM_BASE - * | APOB (64KiB) | + * | APOB (128KiB) | * +--------------------------------+ PSP_APOB_DRAM_ADDRESS * | Early BSP stack | * | (EARLYRAM_BSP_STACK_SIZE) |