GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

*** empty log message *** 

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1345 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Greg Watson 2004-01-22 00:02:12 +00:00
parent 6cc2a5c4c4
commit 47624a8e13
1 changed files with 9 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
src/mainboard/motorola/sandpoint/init.c
View File

@ -44,6 +44,8 @@ void pnp_output(char address, char data)
void
board_init(void)
{
unsigned char reg8;
/*
* Configure FLASH
*/
@ -54,11 +56,16 @@ board_init(void)
/*
* Enable UART0
*
* NOTE: this configuration assumes that the PCI/ISA IO
* address space is properly configured by default on board
* reset. While this seems to be the case with the X3, it may not
* always work.
*/
pnp_output(0x07, 6); /* LD 6 = UART0 */
pnp_output(0x30, 0); /* Dectivate */
pnp_output(0x60, UART0_IO_BASE >> 8); /* IO Base */
pnp_output(0x61, UART0_IO_BASE & 0xFF); /* IO Base */
pnp_output(0x60, TTYS0_BASE >> 8); /* IO Base */
pnp_output(0x61, TTYS0_BASE & 0xFF); /* IO Base */
pnp_output(0x30, 1); /* Activate */
uart8250_init(TTYS0_BASE, 115200/TTYS0_BAUD, TTYS0_LCS);
printk_info("Board initialized...\n");