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{sb,soc}/intel: Drop unused globalnvs.asl methods 

These methods are never used in the code. Drop them.

Change-Id: If5568b494f821d2647ada5ae845bcd015708520e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57984
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
This commit is contained in:
Angel Pons 2021-09-27 12:26:07 +02:00 committed by Patrick Georgi
parent 2fd1e47313
commit 477647cef5
7 changed files with 0 additions and 235 deletions
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28
src/soc/intel/baytrail/acpi/globalnvs.asl
View File

@ -42,31 +42,3 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
, 32, /* 0x34 - Top of Low Memory */
CBMC, 32, /* 0x38 - coreboot mem console pointer */
}
/* Set flag to enable USB charging in S3 */
Method (S3UE)
{
Store (One, \S3U0)
Store (One, \S3U1)
}
/* Set flag to disable USB charging in S3 */
Method (S3UD)
{
Store (Zero, \S3U0)
Store (Zero, \S3U1)
}
/* Set flag to enable USB charging in S5 */
Method (S5UE)
{
Store (One, \S5U0)
Store (One, \S5U1)
}
/* Set flag to disable USB charging in S5 */
Method (S5UD)
{
Store (Zero, \S5U0)
Store (Zero, \S5U1)
}

28
src/soc/intel/braswell/acpi/globalnvs.asl
View File

@ -43,31 +43,3 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
, 32, /* 0x34 - Top of Low Memory */
CBMC, 32, /* 0x38 - coreboot mem console pointer */
}
/* Set flag to enable USB charging in S3 */
Method (S3UE)
{
Store (One, \S3U0)
Store (One, \S3U1)
}
/* Set flag to disable USB charging in S3 */
Method (S3UD)
{
Store (Zero, \S3U0)
Store (Zero, \S3U1)
}
/* Set flag to enable USB charging in S5 */
Method (S5UE)
{
Store (One, \S5U0)
Store (One, \S5U1)
}
/* Set flag to disable USB charging in S5 */
Method (S5UD)
{
Store (Zero, \S5U0)
Store (Zero, \S5U1)
}

36
src/soc/intel/broadwell/pch/acpi/globalnvs.asl
View File

@ -33,39 +33,3 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
PM1I, 64, // 0x20 - 0x27 - PM1 wake status bit
GPEI, 64, // 0x28 - 0x2f - GPE wake status bit
}
/* Set flag to enable USB charging in S3 */
Method (S3UE)
{
\S3U0 = 1
}
/* Set flag to disable USB charging in S3 */
Method (S3UD)
{
\S3U0 = 0
}
/* Set flag to enable USB charging in S5 */
Method (S5UE)
{
\S5U0 = 1
}
/* Set flag to disable USB charging in S5 */
Method (S5UD)
{
\S5U0 = 0
}
/* Set flag to enable 3G module in S3 */
Method (S3GE)
{
\S33G = 1
}
/* Set flag to disable 3G module in S3 */
Method (S3GD)
{
\S33G = 0
}

28
src/soc/intel/denverton_ns/acpi/globalnvs.asl
View File

@ -46,31 +46,3 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
TSGB, 32, // 0x54 - TSEG Base
TSSZ, 32, // 0x58 - TSEG Size
}
/* Set flag to enable USB charging in S3 */
Method (S3UE)
{
\S3U0 = 1
\S3U1 = 1
}
/* Set flag to disable USB charging in S3 */
Method (S3UD)
{
\S3U0 = 0
\S3U1 = 0
}
/* Set flag to enable USB charging in S5 */
Method (S5UE)
{
\S5U0 = 1
\S5U1 = 1
}
/* Set flag to disable USB charging in S5 */
Method (S5UD)
{
\S5U0 = 0
\S5U1 = 0
}

24
src/soc/intel/skylake/acpi/globalnvs.asl
View File

@ -45,27 +45,3 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
A4GB, 64, // 0x54 - 0x5B Base of above 4GB MMIO Resource
A4GS, 64, // 0x5C - 0x63 Length of above 4GB MMIO Resource
}
/* Set flag to enable USB charging in S3 */
Method (S3UE)
{
\S3U0 = 1
}
/* Set flag to disable USB charging in S3 */
Method (S3UD)
{
\S3U0 = 0
}
/* Set flag to enable USB charging in S5 */
Method (S5UE)
{
\S5U0 = 1
}
/* Set flag to disable USB charging in S5 */
Method (S5UD)
{
\S5U0 = 0
}

51
src/southbridge/intel/bd82x6x/acpi/globalnvs.asl
View File

@ -106,57 +106,6 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
CBMC, 32,
}
/* Set flag to enable USB charging in S3 */
Method (S3UE)
{
\S3U0 = 1
\S3U1 = 1
}
/* Set flag to disable USB charging in S3 */
Method (S3UD)
{
\S3U0 = 0
\S3U1 = 0
}
/* Set flag to enable USB charging in S5 */
Method (S5UE)
{
\S5U0 = 1
\S5U1 = 1
}
/* Set flag to disable USB charging in S5 */
Method (S5UD)
{
\S5U0 = 0
\S5U1 = 0
}
/* Set flag to enable 3G module in S3 */
Method (S3GE)
{
\S33G = 1
}
/* Set flag to disable 3G module in S3 */
Method (S3GD)
{
\S33G = 0
}
/* Set XHCI Mode enable */
Method (XHCE)
{
\XHCI = 1
}
/* Set XHCI Mode disable */
Method (XHCD)
{
\XHCI = 0
}
External (\_TZ.SKIN)
Method (TZUP)

40
src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
View File

@ -96,46 +96,6 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
GPEI, 32, // GPE Wake Source
}
/* Set flag to enable USB charging in S3 */
Method (S3UE)
{
\S3U0 = 1
\S3U1 = 1
}
/* Set flag to disable USB charging in S3 */
Method (S3UD)
{
\S3U0 = 0
\S3U1 = 0
}
/* Set flag to enable USB charging in S5 */
Method (S5UE)
{
\S5U0 = 1
\S5U1 = 1
}
/* Set flag to disable USB charging in S5 */
Method (S5UD)
{
\S5U0 = 0
\S5U1 = 0
}
/* Set flag to enable 3G module in S3 */
Method (S3GE)
{
\S33G = 1
}
/* Set flag to disable 3G module in S3 */
Method (S3GD)
{
\S33G = 0
}
External (\_TZ.SKIN)
Method (TZUP)