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mb/google/eve: Remove ACPI control of touchscreen power 

Change the touchscreen power control back to coreboot instead of
under the ACPI _ON/_OFF methods, and switch the TOUCHSCREEN_STOP_L
pin back to an output.

This reverts previous changes to touchscreen GPIOs that were made
to get back to a known good/working state.  Having ACPI control these
pins was resulting in a small percentage of touchscreen not being
discovered at boot.  This platform is not intending to use S0ix so
the ACPI control is not needed.

BUG=b:63718744
TEST=manual testing on Eve devices.

Change-Id: I3fd64a435a053da1558ef736fe7baceee3c8f3a0
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Change-Id: Ia1e2ae7ca2a8b668c60fbda2aa50373e580646b2
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/572692
Original-Reviewed-by: Duncan Laurie <dlaurie@google.com>
Original-Commit-Queue: Duncan Laurie <dlaurie@google.com>
Original-Tested-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/22445
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Duncan Laurie 2017-07-15 14:13:37 -07:00
parent 4cd93b3b7f
commit 477942e253
3 changed files with 8 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/mainboard/google/eve/devicetree.cb
View File

@ -236,10 +236,6 @@ chip soc/intel/skylake
register "generic.desc" = ""WCOM Digitizer"" register "generic.desc" = ""WCOM Digitizer""
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)" register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)"
register "generic.speed" = "I2C_SPEED_FAST_PLUS" register "generic.speed" = "I2C_SPEED_FAST_PLUS"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C22)"
register "generic.enable_delay_ms" = "250"
register "hid_desc_reg_offset" = "0x1" register "hid_desc_reg_offset" = "0x1"
device i2c 0a on end device i2c 0a on end
end end

5
src/mainboard/google/eve/gpio.h
View File

@ -121,7 +121,7 @@ static const struct pad_config gpio_table[] = {
/* I2C1_SCL */ PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), /* TPM */ /* I2C1_SCL */ PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), /* TPM */
/* UART2_RXD */ PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* SERVO */ /* UART2_RXD */ PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* SERVO */
/* UART2_TXD */ PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* SERVO */ /* UART2_TXD */ PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* SERVO */
/* UART2_RTS# */ PAD_CFG_GPO(GPP_C22, 0, DEEP), /* EN_PP3300_DX_TOUCHSCREEN */ /* UART2_RTS# */ PAD_CFG_GPO(GPP_C22, 1, DEEP), /* EN_PP3300_DX_TOUCHSCREEN */
/* UART2_CTS# */ PAD_CFG_GPI_GPIO_DRIVER(GPP_C23, 20K_PU, /* UART2_CTS# */ PAD_CFG_GPI_GPIO_DRIVER(GPP_C23, 20K_PU,
DEEP), /* PCH_WP */ DEEP), /* PCH_WP */
@ -162,8 +162,7 @@ static const struct pad_config gpio_table[] = {
/* SATALED# */ PAD_CFG_NC(GPP_E8), /* SATALED# */ PAD_CFG_NC(GPP_E8),
/* USB2_OCO# */ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), /* USB_C0_OC_ODL */ /* USB2_OCO# */ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), /* USB_C0_OC_ODL */
/* USB2_OC1# */ PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1), /* USB_C1_OC_ODL */ /* USB2_OC1# */ PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1), /* USB_C1_OC_ODL */
/* USB2_OC2# */ PAD_CFG_GPI_GPIO_DRIVER(GPP_E11, NONE, /* USB2_OC2# */ PAD_CFG_GPO(GPP_E11, 1, DEEP), /* TOUCHSCREEN_STOP_L */
DEEP), /* TOUCHSCREEN_STOP_L */
/* USB2_OC3# */ PAD_CFG_NC(GPP_E12), /* USB2_OC3# */ PAD_CFG_NC(GPP_E12),
/* DDPB_HPD0 */ PAD_CFG_NF(GPP_E13, 20K_PD, DEEP, NF1), /* USB_C0_DP_HPD */ /* DDPB_HPD0 */ PAD_CFG_NF(GPP_E13, 20K_PD, DEEP, NF1), /* USB_C0_DP_HPD */
/* DDPC_HPD1 */ PAD_CFG_NF(GPP_E14, 20K_PD, DEEP, NF1), /* USB_C1_DP_HPD */ /* DDPC_HPD1 */ PAD_CFG_NF(GPP_E14, 20K_PD, DEEP, NF1), /* USB_C1_DP_HPD */

6
src/mainboard/google/eve/smihandler.c
View File

@ -30,6 +30,12 @@ static void mainboard_gpio_smi_sleep(u8 slp_typ)
{ {
/* Power down the rails on any sleep type */ /* Power down the rails on any sleep type */
gpio_set(EN_PP3300_DX_CAM, 0); gpio_set(EN_PP3300_DX_CAM, 0);
/* Assert TOUSHCREEN_STOP_L */
gpio_set(GPP_E11, 0);
/* Turn off touchscreen power */
gpio_set(GPP_C22, 0);
} }
void mainboard_smi_sleep(u8 slp_typ) void mainboard_smi_sleep(u8 slp_typ)