soc/intel/apollolake: Use consistent convention for community names
Instead of using a mix of _N and _NORTH, _NW and _NORTHWEST for GPIO community names, follow one single convention. This allows for re-using macros easily. Change-Id: Icd9cf9ef70d03576d864688cf5d6946124c259c3 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/16353 Reviewed-by: Lijian Zhao <lijian.zhao@intel.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -38,7 +38,7 @@ scope (\_SB) {
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Method (_CRS, 0x0, NotSerialized)
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{
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CreateDwordField (^RBUF, ^RMEM._BAS, RBAS)
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ShiftLeft (GPIO_NORTH, 16, Local0)
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ShiftLeft (GPIO_N, 16, Local0)
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Or (CONFIG_IOSF_BASE_ADDRESS, Local0, RBAS)
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Return (^RBUF)
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}
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@ -69,7 +69,7 @@ scope (\_SB) {
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Method (_CRS, 0x0, NotSerialized)
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{
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CreateDwordField (^RBUF, ^RMEM._BAS, RBAS)
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ShiftLeft (GPIO_NORTHWEST, 16, Local0)
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ShiftLeft (GPIO_NW, 16, Local0)
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Or (CONFIG_IOSF_BASE_ADDRESS, Local0, RBAS)
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Return (^RBUF)
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}
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@ -100,7 +100,7 @@ scope (\_SB) {
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Method (_CRS, 0x0, NotSerialized)
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{
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CreateDwordField (^RBUF, ^RMEM._BAS, RBAS)
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ShiftLeft (GPIO_WEST, 16, Local0)
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ShiftLeft (GPIO_W, 16, Local0)
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Or (CONFIG_IOSF_BASE_ADDRESS, Local0, RBAS)
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Return (^RBUF)
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}
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@ -131,7 +131,7 @@ scope (\_SB) {
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Method (_CRS, 0x0, NotSerialized)
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{
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CreateDwordField (^RBUF, ^RMEM._BAS, RBAS)
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ShiftLeft (GPIO_SOUTHWEST, 16, Local0)
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ShiftLeft (GPIO_SW, 16, Local0)
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Or (CONFIG_IOSF_BASE_ADDRESS, Local0, RBAS)
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Return (^RBUF)
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}
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@ -31,25 +31,25 @@ static const struct pad_community {
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const char *grp_name;
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} gpio_communities[] = {
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{
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.port = GPIO_SOUTHWEST,
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.port = GPIO_SW,
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.first_pad = SW_OFFSET,
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.num_gpi_regs = NUM_SW_GPI_REGS,
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.gpi_offset = 0,
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.grp_name = "GPIO_GPE_SW",
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}, {
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.port = GPIO_WEST,
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.port = GPIO_W,
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.first_pad = W_OFFSET,
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.num_gpi_regs = NUM_W_GPI_REGS,
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.gpi_offset = NUM_SW_GPI_REGS,
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.grp_name = "GPIO_GPE_W",
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}, {
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.port = GPIO_NORTHWEST,
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.port = GPIO_NW,
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.first_pad = NW_OFFSET,
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.num_gpi_regs = NUM_NW_GPI_REGS,
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.gpi_offset = NUM_W_GPI_REGS + NUM_SW_GPI_REGS,
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.grp_name = "GPIO_GPE_NW",
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}, {
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.port = GPIO_NORTH,
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.port = GPIO_N,
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.first_pad = N_OFFSET,
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.num_gpi_regs = NUM_N_GPI_REGS,
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.gpi_offset = NUM_NW_GPI_REGS+ NUM_W_GPI_REGS + NUM_SW_GPI_REGS,
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@ -229,13 +229,13 @@ const char *gpio_acpi_path(gpio_t gpio_num)
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const struct pad_community *comm = gpio_get_community(gpio_num);
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switch (comm->port) {
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case GPIO_NORTH:
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case GPIO_N:
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return "\\_SB.GPO0";
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case GPIO_NORTHWEST:
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case GPIO_NW:
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return "\\_SB.GPO1";
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case GPIO_WEST:
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case GPIO_W:
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return "\\_SB.GPO2";
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case GPIO_SOUTHWEST:
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case GPIO_SW:
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return "\\_SB.GPO3";
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}
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@ -247,13 +247,13 @@ uint16_t gpio_acpi_pin(gpio_t gpio_num)
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const struct pad_community *comm = gpio_get_community(gpio_num);
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switch (comm->port) {
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case GPIO_NORTH:
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case GPIO_N:
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return PAD_N(gpio_num);
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case GPIO_NORTHWEST:
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case GPIO_NW:
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return PAD_NW(gpio_num);
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case GPIO_WEST:
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case GPIO_W:
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return PAD_W(gpio_num);
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case GPIO_SOUTHWEST:
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case GPIO_SW:
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return PAD_SW(gpio_num);
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}
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@ -130,11 +130,11 @@
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#define PAD_CFG_OFFSET(pad) (PAD_CFG_BASE + ((pad) * 8))
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/* IOSF port numbers for GPIO comminuties*/
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#define GPIO_SOUTHWEST 0xc0
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#define GPIO_SOUTH 0xc2
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#define GPIO_NORTHWEST 0xc4
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#define GPIO_NORTH 0xc5
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#define GPIO_WEST 0xc7
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#define GPIO_SW 0xc0
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#define GPIO_S 0xc2
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#define GPIO_NW 0xc4
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#define GPIO_N 0xc5
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#define GPIO_W 0xc7
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#define GPI_SMI_STS_0 0x140
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#define GPI_SMI_EN_0 0x150
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