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mb/amd/mandolin: fix DXIO lane numbers 

The DXIO descriptors use the logical and not the physical lane numbers,
which are different.

Change-Id: I7a90056d782d8d32fe34a0f5bdb61c3b61df1af8
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43492
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Felix Held 2020-07-15 22:22:10 +02:00
parent b39e10dbaa
commit 4794264ff1
1 changed files with 6 additions and 6 deletions
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12
src/mainboard/amd/mandolin/variants/mandolin/port_descriptors.c
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@ -60,8 +60,8 @@ static const fsp_pcie_descriptor pco_pcie_descriptors[] = {
{ /* WWAN */ { /* WWAN */
.port_present = true, .port_present = true,
.engine_type = PCIE_ENGINE, .engine_type = PCIE_ENGINE,
.start_lane = 2, .start_lane = 6,
.end_lane = 2, .end_lane = 6,
.device_number = 1, .device_number = 1,
.function_number = 4, .function_number = 4,
.link_aspm = ASPM_L1, .link_aspm = ASPM_L1,
@ -73,8 +73,8 @@ static const fsp_pcie_descriptor pco_pcie_descriptors[] = {
{ /* WIFI */ { /* WIFI */
.port_present = true, .port_present = true,
.engine_type = PCIE_ENGINE, .engine_type = PCIE_ENGINE,
.start_lane = 3, .start_lane = 7,
.end_lane = 3, .end_lane = 7,
.gpio_group_id = 1, .gpio_group_id = 1,
.device_number = 1, .device_number = 1,
.function_number = 5, .function_number = 5,
@ -87,8 +87,8 @@ static const fsp_pcie_descriptor pco_pcie_descriptors[] = {
{ /* SATA EXPRESS */ { /* SATA EXPRESS */
.port_present = true, .port_present = true,
.engine_type = SATA_ENGINE, .engine_type = SATA_ENGINE,
.start_lane = 6, .start_lane = 2,
.end_lane = 7, .end_lane = 3,
.gpio_group_id = 1, .gpio_group_id = 1,
.channel_type = SATA_CHANNEL_LONG, .channel_type = SATA_CHANNEL_LONG,
} }