ramstage: Align stack to 16 bytes
Some SSE instructions could take 128bit memory operands from stack. AGESA vendorcode was always built with SSE enabled, but until now stack alignment was not known to cause major issues. Seems like GCC-6.3 more likely emits instructions that depend on the 16 byte alignment of stack. Change-Id: Iea3de54f20ff242105bce5a5edbbd76b04c0116c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/18823 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -110,6 +110,8 @@ _start:
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*/
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post_code(POST_PRE_HARDWAREMAIN) /* post fe */
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andl $0xFFFFFFF0, %esp
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#if CONFIG_GDB_WAIT
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call gdb_hw_init
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call gdb_stub_breakpoint
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