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tegra124: fix OSC initialization on LP0 resume 

Add a missing "~" so that we mask off just OSC_XOFS field and not the
rest of the register.

BUG=chrome-os-partner:26326
TEST=XHCI sometimes works after LP0.
BRANCH=none

Original-Change-Id: I2df2387dbad6920d36aa2ae5e6cd91e9ec42fa08
Original-Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/188897
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
(cherry picked from commit bdbe9ead46fa883618a4acedd1feaf676e2eb29b)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Ic853e737fc106527eb3bb15c25bf801a36bbff57
Reviewed-on: http://review.coreboot.org/7412
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
This commit is contained in:
Andrew Bresticker 2014-03-05 11:38:54 -08:00 committed by Marc Jones
parent 25bf7757b7
commit 479cfeb12b
1 changed files with 1 additions and 1 deletions
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2
src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c
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@ -326,7 +326,7 @@ static void config_oscillator(void)
PMC_XOFS_MASK) >> PMC_XOFS_SHIFT;
uint32_t osc_ctrl = read32(clk_rst_osc_ctrl_ptr);
osc_ctrl &= OSC_XOFS_MASK;
osc_ctrl &= ~OSC_XOFS_MASK;
osc_ctrl |= (xofs << OSC_XOFS_SHIFT);
osc_ctrl |= OSC_XOE;
write32(osc_ctrl, clk_rst_osc_ctrl_ptr);