glados/kunimitsu: remove the implementation of mainboard_add_dimm_info
This is a follow-up patch to https://chromium-review.googlesource.com/#/c/286877, after fsp support is landed in v1.5. BUG=chrome-os-partner:42975 BRANCH=none TEST=execute "mosys memory spd print all" on glados and kunimitsu Change-Id: I949e287372b190affac36a0efde8a30402eecdc8 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 71a2e1838ff8bbaa358c167dad905b63d23c43fa Original-Change-Id: I64103af4f8456a053a955845a067062122f47af3 Original-Signed-off-by: Robbie Zhang <robbie.zhang@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/298967 Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/11657 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -21,7 +21,6 @@
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#include <cbfs.h>
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#include <cbfs.h>
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#include <console/console.h>
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#include <console/console.h>
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#include <memory_info.h>
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#include <string.h>
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#include <string.h>
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#include <ec/google/chromeec/ec.h>
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#include <ec/google/chromeec/ec.h>
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#include <soc/gpio.h>
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#include <soc/gpio.h>
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@ -77,18 +76,3 @@ void mainboard_memory_init_params(struct romstage_params *params,
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memory_params->MemorySpdDataLen = SPD_LEN;
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memory_params->MemorySpdDataLen = SPD_LEN;
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memory_params->DqPinsInterleaved = FALSE;
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memory_params->DqPinsInterleaved = FALSE;
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}
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}
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void mainboard_add_dimm_info(struct romstage_params *params,
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struct memory_info *mem_info,
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int channel, int dimm, int index)
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{
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/* Set the manufacturer */
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memcpy(&mem_info->dimm[index].mod_id,
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¶ms->pei_data->spd_data[channel][dimm][SPD_MANU_OFF],
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sizeof(mem_info->dimm[index].mod_id));
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/* Set the module part number */
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memcpy(mem_info->dimm[index].module_part_number,
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¶ms->pei_data->spd_data[channel][dimm][SPD_PART_OFF],
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sizeof(mem_info->dimm[index].module_part_number));
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}
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@ -21,7 +21,6 @@
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#include <cbfs.h>
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#include <cbfs.h>
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#include <console/console.h>
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#include <console/console.h>
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#include <memory_info.h>
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#include <string.h>
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#include <string.h>
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#include <ec/google/chromeec/ec.h>
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#include <ec/google/chromeec/ec.h>
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#include <soc/gpio.h>
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#include <soc/gpio.h>
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@ -77,18 +76,3 @@ void mainboard_memory_init_params(struct romstage_params *params,
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memory_params->MemorySpdDataLen = SPD_LEN;
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memory_params->MemorySpdDataLen = SPD_LEN;
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memory_params->DqPinsInterleaved = FALSE;
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memory_params->DqPinsInterleaved = FALSE;
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}
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}
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void mainboard_add_dimm_info(struct romstage_params *params,
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struct memory_info *mem_info,
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int channel, int dimm, int index)
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{
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/* Set the manufacturer */
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memcpy(&mem_info->dimm[index].mod_id,
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¶ms->pei_data->spd_data[channel][dimm][SPD_MANU_OFF],
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sizeof(mem_info->dimm[index].mod_id));
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/* Set the module part number */
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memcpy(mem_info->dimm[index].module_part_number,
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¶ms->pei_data->spd_data[channel][dimm][SPD_PART_OFF],
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sizeof(mem_info->dimm[index].module_part_number));
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}
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