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nb/intel/sandybridge: Move steppings to CPU header 

The steppings correspond to the CPUID bits 3:0, so move them to the CPU
scope, and include the CPU header from files using the stepping macros.

Change-Id: Idf8fba4911f98953bb909777aea57295774d8400
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48409
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-12-07 13:15:23 +01:00 committed by Felix Held
parent 5db1b15147
commit 47a80a045d
5 changed files with 26 additions and 24 deletions
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24
src/cpu/intel/model_206ax/model_206ax.h
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@ -6,6 +6,30 @@
#include <arch/cpu.h> #include <arch/cpu.h>
#include <stdint.h> #include <stdint.h>
/* SandyBridge CPU stepping */
#define SNB_STEP_D0 5 /* Also J0 */
#define SNB_STEP_D1 6
#define SNB_STEP_D2 7 /* Also J1/Q0 */
/* IvyBridge CPU stepping */
#define IVB_STEP_A0 0
#define IVB_STEP_B0 2
#define IVB_STEP_C0 4
#define IVB_STEP_K0 5
#define IVB_STEP_D0 6
#define IS_SANDY_CPU(x) ((x & 0xffff0) == 0x206a0)
#define IS_SANDY_CPU_C(x) ((x & 0xf) == 4)
#define IS_SANDY_CPU_D0(x) ((x & 0xf) == 5)
#define IS_SANDY_CPU_D1(x) ((x & 0xf) == 6)
#define IS_SANDY_CPU_D2(x) ((x & 0xf) == 7)
#define IS_IVY_CPU(x) ((x & 0xffff0) == 0x306a0)
#define IS_IVY_CPU_C(x) ((x & 0xf) == 4)
#define IS_IVY_CPU_K(x) ((x & 0xf) == 5)
#define IS_IVY_CPU_D(x) ((x & 0xf) == 6)
#define IS_IVY_CPU_E(x) ((x & 0xf) >= 8)
/* SandyBridge/IvyBridge bus clock is fixed at 100MHz */ /* SandyBridge/IvyBridge bus clock is fixed at 100MHz */
#define SANDYBRIDGE_BCLK 100 #define SANDYBRIDGE_BCLK 100

1
src/northbridge/intel/sandybridge/raminit_common.c
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@ -3,6 +3,7 @@
#include <assert.h> #include <assert.h>
#include <commonlib/helpers.h> #include <commonlib/helpers.h>
#include <console/console.h> #include <console/console.h>
#include <cpu/intel/model_206ax/model_206ax.h>
#include <string.h> #include <string.h>
#include <arch/cpu.h> #include <arch/cpu.h>
#include <device/mmio.h> #include <device/mmio.h>

12
src/northbridge/intel/sandybridge/raminit_common.h
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@ -8,18 +8,6 @@
#define BASEFREQ 133 #define BASEFREQ 133
#define tDLLK 512 #define tDLLK 512
#define IS_SANDY_CPU(x) ((x & 0xffff0) == 0x206a0)
#define IS_SANDY_CPU_C(x) ((x & 0xf) == 4)
#define IS_SANDY_CPU_D0(x) ((x & 0xf) == 5)
#define IS_SANDY_CPU_D1(x) ((x & 0xf) == 6)
#define IS_SANDY_CPU_D2(x) ((x & 0xf) == 7)
#define IS_IVY_CPU(x) ((x & 0xffff0) == 0x306a0)
#define IS_IVY_CPU_C(x) ((x & 0xf) == 4)
#define IS_IVY_CPU_K(x) ((x & 0xf) == 5)
#define IS_IVY_CPU_D(x) ((x & 0xf) == 6)
#define IS_IVY_CPU_E(x) ((x & 0xf) >= 8)
#define NUM_CHANNELS 2 #define NUM_CHANNELS 2
#define NUM_SLOTRANKS 4 #define NUM_SLOTRANKS 4
#define NUM_SLOTS 2 #define NUM_SLOTS 2

1
src/northbridge/intel/sandybridge/raminit_native.c
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@ -3,6 +3,7 @@
#include <commonlib/clamp.h> #include <commonlib/clamp.h>
#include <console/console.h> #include <console/console.h>
#include <console/usb.h> #include <console/usb.h>
#include <cpu/intel/model_206ax/model_206ax.h>
#include <delay.h> #include <delay.h>
#include <device/device.h> #include <device/device.h>
#include <device/pci_def.h> #include <device/pci_def.h>

12
src/northbridge/intel/sandybridge/sandybridge.h
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@ -8,18 +8,6 @@
#define BASE_REV_IVB 0x50 #define BASE_REV_IVB 0x50
#define BASE_REV_MASK 0x50 #define BASE_REV_MASK 0x50
/* SandyBridge CPU stepping */
#define SNB_STEP_D0 5 /* Also J0 */
#define SNB_STEP_D1 6
#define SNB_STEP_D2 7 /* Also J1/Q0 */
/* IvyBridge CPU stepping */
#define IVB_STEP_A0 0
#define IVB_STEP_B0 2
#define IVB_STEP_C0 4
#define IVB_STEP_K0 5
#define IVB_STEP_D0 6
#include "memmap.h" #include "memmap.h"
/* Everything below this line is ignored in the DSDT */ /* Everything below this line is ignored in the DSDT */