diff --git a/src/mainboard/google/butterfly/early_init.c b/src/mainboard/google/butterfly/early_init.c
index 19910bac99..4980fa8dfb 100644
--- a/src/mainboard/google/butterfly/early_init.c
+++ b/src/mainboard/google/butterfly/early_init.c
@@ -30,8 +30,6 @@
 
 void mainboard_late_rcba_config(void)
 {
-	u32 reg32;
-
 	/*
 	 *             GFX    INTA -> PIRQA (MSI)
 	 * D28IP_P1IP  WLAN   INTA -> PIRQB
@@ -68,12 +66,6 @@ void mainboard_late_rcba_config(void)
 	DIR_ROUTE(D26IR, PIRQF, PIRQE, PIRQG, PIRQH);
 	DIR_ROUTE(D25IR, PIRQA, PIRQB, PIRQC, PIRQD);
 	DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD);
-
-	/* Disable unused devices (board specific) */
-	reg32 = RCBA32(FD);
-	/* Disable PCI bridge so MRC does not probe this bus */
-	reg32 |= PCH_DISABLE_P2P;
-	RCBA32(FD) = reg32;
 }
 
 const struct southbridge_usb_port mainboard_usb_ports[] = {
diff --git a/src/mainboard/google/parrot/early_init.c b/src/mainboard/google/parrot/early_init.c
index 7310b01b7f..74c5c8694f 100644
--- a/src/mainboard/google/parrot/early_init.c
+++ b/src/mainboard/google/parrot/early_init.c
@@ -28,8 +28,6 @@
 
 void mainboard_late_rcba_config(void)
 {
-	u32 reg32;
-
 	/*
 	 *             GFX    INTA -> PIRQA (MSI)
 	 * D28IP_P2IP  WLAN   INTA -> PIRQB
@@ -67,12 +65,6 @@ void mainboard_late_rcba_config(void)
 	DIR_ROUTE(D26IR, PIRQF, PIRQE, PIRQG, PIRQH);
 	DIR_ROUTE(D25IR, PIRQA, PIRQB, PIRQC, PIRQD);
 	DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD);
-
-	/* Disable unused devices (board specific) */
-	reg32 = RCBA32(FD);
-	/* Disable PCI bridge so MRC does not probe this bus */
-	reg32 |= PCH_DISABLE_P2P;
-	RCBA32(FD) = reg32;
 }
 
 void mainboard_fill_pei_data(struct pei_data *pei_data)
diff --git a/src/mainboard/google/stout/early_init.c b/src/mainboard/google/stout/early_init.c
index 94d409297c..754bec60bb 100644
--- a/src/mainboard/google/stout/early_init.c
+++ b/src/mainboard/google/stout/early_init.c
@@ -32,8 +32,6 @@
 
 void mainboard_late_rcba_config(void)
 {
-	u32 reg32;
-
 	/*
 	 *             GFX         INTA -> PIRQA (MSI)
 	 * D20IP_XHCI  XHCI        INTA -> PIRQD (MSI)
@@ -71,12 +69,6 @@ void mainboard_late_rcba_config(void)
 	DIR_ROUTE(D25IR, PIRQA, PIRQB, PIRQC, PIRQD);
 	DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD);
 	DIR_ROUTE(D20IR, PIRQD, PIRQE, PIRQF, PIRQG);
-
-	/* Disable unused devices (board specific) */
-	reg32 = RCBA32(FD);
-	/* Disable PCI bridge so MRC does not probe this bus */
-	reg32 |= PCH_DISABLE_P2P;
-	RCBA32(FD) = reg32;
 }
 
 	/*
diff --git a/src/mainboard/intel/dcp847ske/early_southbridge.c b/src/mainboard/intel/dcp847ske/early_southbridge.c
index 34310a0094..9cdcd5dec2 100644
--- a/src/mainboard/intel/dcp847ske/early_southbridge.c
+++ b/src/mainboard/intel/dcp847ske/early_southbridge.c
@@ -30,9 +30,6 @@
 
 void mainboard_late_rcba_config(void)
 {
-	/* Disable devices */
-	RCBA32(FD) |= PCH_DISABLE_P2P;
-
 	/* Set "mobile" bit in MCH (which makes sense layout-wise). */
 	/* Note sure if this has any effect at all though. */
 	MCHBAR32(0x0004) |= 0x00001000;
diff --git a/src/mainboard/kontron/ktqm77/early_init.c b/src/mainboard/kontron/ktqm77/early_init.c
index 6a483bc670..eac19f47bb 100644
--- a/src/mainboard/kontron/ktqm77/early_init.c
+++ b/src/mainboard/kontron/ktqm77/early_init.c
@@ -44,17 +44,6 @@ void mainboard_pch_lpc_setup(void)
 			   COMA_LPC_EN | COMB_LPC_EN);
 }
 
-void mainboard_late_rcba_config(void)
-{
-	u32 reg32;
-
-	/* Disable unused devices (board specific) */
-	reg32 = RCBA32(FD);
-	/* Disable PCI bridge so MRC does not probe this bus */
-	reg32 |= PCH_DISABLE_P2P;
-	RCBA32(FD) = reg32;
-}
-
 void bootblock_mainboard_early_init(void)
 {
 	int lvds_3v = 0; /* 0 (5V) or 1 (3V3) */
diff --git a/src/mainboard/roda/rv11/early_init.c b/src/mainboard/roda/rv11/early_init.c
index f1681384a8..5c5e8d8b93 100644
--- a/src/mainboard/roda/rv11/early_init.c
+++ b/src/mainboard/roda/rv11/early_init.c
@@ -16,17 +16,6 @@
 #include <northbridge/intel/sandybridge/sandybridge.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 
-void mainboard_late_rcba_config(void)
-{
-	u32 reg32;
-
-	/* Disable unused devices (board specific) */
-	reg32 = RCBA32(FD);
-	/* Disable PCI bridge so MRC does not probe this bus */
-	reg32 |= PCH_DISABLE_P2P;
-	RCBA32(FD) = reg32;
-}
-
 int mainboard_should_reset_usb(int s3resume)
 {
 	return !s3resume;
diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c
index a8acfbf980..29c766a59f 100644
--- a/src/northbridge/intel/sandybridge/raminit_mrc.c
+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c
@@ -18,6 +18,7 @@
 #include <bootmode.h>
 #include <cf9_reset.h>
 #include <string.h>
+#include <device/device.h>
 #include <device/pci_ops.h>
 #include <arch/cpu.h>
 #include <cbmem.h>
@@ -382,6 +383,16 @@ static void devicetree_fill_pei_data(struct pei_data *pei_data)
 	pei_data->usb3.xhci_streams = cfg->usb3.xhci_streams;
 }
 
+static void disable_p2p(void)
+{
+	/* Disable PCI-to-PCI bridge early to prevent probing by MRC. */
+	const struct device *const p2p = pcidev_on_root(0x1e, 0);
+	if (p2p && p2p->enabled)
+		return;
+
+	RCBA32(FD) |= PCH_DISABLE_P2P;
+}
+
 void perform_raminit(int s3resume)
 {
 	int cbmem_was_initted;
@@ -423,6 +434,8 @@ void perform_raminit(int s3resume)
 		}
 	}
 
+	disable_p2p();
+
 	pei_data.boot_mode = s3resume ? 2 : 0;
 	timestamp_add_now(TS_BEFORE_INITRAM);
 	sdram_initialize(&pei_data);