GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/amd/common/block/acpi/ivrs: conditionally generate eMMC entry 

The eMMC entry in the IVRS table should only be generated if an eMMC
controller is present in the SoC.

Where the PCI_DEVFN(0x13, 1) is from is currently unclear to me. There
is no PCI device 0x13 on bus 0 and the eMMC controller is also an MMIO
device and not a PCI device, but this is what the reference code does.
My guess would be that it mainly needs to be a unique PCI device that
won't collide with any existing PCI device in the SoC. Add a comment
about this too.

TEST=None

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I00865cb7caf82547e89eb5e77817e3d8ca5d35dd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75933
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
This commit is contained in:
Felix Held 2023-06-20 19:17:43 +02:00
parent 87a9d8ffe6
commit 47ed2714c8
1 changed files with 9 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/soc/amd/common/block/acpi/ivrs.c
View File

@ -245,11 +245,16 @@ static unsigned long acpi_fill_ivrs40(unsigned long current, acpi_ivrs_ivhd_t *i
if (nb_dev->bus->secondary == 0) {
/* Describe EMMC */
if (CONFIG(SOC_AMD_COMMON_BLOCK_EMMC)) {
/* PCI_DEVFN(0x13, 1) doesn't exist in the hardware, but it's what the
* reference code uses. Maybe to have a unique PCI device to put into
* the field that doesn't collide with any existing device? */
current = ivhd_describe_f0_device(current, PCI_DEVFN(0x13, 1),
IVHD_DTE_LINT_1_PASS | IVHD_DTE_LINT_0_PASS |
IVHD_DTE_SYS_MGT_TRANS | IVHD_DTE_NMI_PASS |
IVHD_DTE_EXT_INT_PASS | IVHD_DTE_INIT_PASS);
}
}
ivhd_40->length += (current - current_backup);
return current;