cpu/intel: Rename socket_mFCPGA478 to socket_m

The name was wrong. mFCPGA478 is actually a pseudonym for mPGA478MN,
the successor of the socket that was meant.

The official name of this socket is mPGA478MT. But "Socket M" is much
easier to distinguish.

Change-Id: I4efeaca69acddfcdc5e957b0b521544314d46eeb
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/31642
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Nico Huber 2019-02-27 14:23:18 +01:00 committed by Patrick Georgi
parent 620e0f3f22
commit 4829af17e3
21 changed files with 22 additions and 22 deletions

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@ -22,7 +22,7 @@ source src/cpu/intel/slot_1/Kconfig
source src/cpu/intel/socket_BGA956/Kconfig source src/cpu/intel/socket_BGA956/Kconfig
source src/cpu/intel/socket_BGA1284/Kconfig source src/cpu/intel/socket_BGA1284/Kconfig
source src/cpu/intel/socket_FCBGA559/Kconfig source src/cpu/intel/socket_FCBGA559/Kconfig
source src/cpu/intel/socket_mFCPGA478/Kconfig source src/cpu/intel/socket_m/Kconfig
source src/cpu/intel/socket_mPGA478MN/Kconfig source src/cpu/intel/socket_mPGA478MN/Kconfig
source src/cpu/intel/socket_mPGA604/Kconfig source src/cpu/intel/socket_mPGA604/Kconfig
source src/cpu/intel/socket_441/Kconfig source src/cpu/intel/socket_441/Kconfig

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@ -8,7 +8,7 @@ subdirs-$(CONFIG_CPU_INTEL_SOCKET_441) += socket_441
subdirs-$(CONFIG_CPU_INTEL_SOCKET_BGA956) += socket_BGA956 subdirs-$(CONFIG_CPU_INTEL_SOCKET_BGA956) += socket_BGA956
subdirs-$(CONFIG_CPU_INTEL_SOCKET_BGA1284) += socket_BGA1284 subdirs-$(CONFIG_CPU_INTEL_SOCKET_BGA1284) += socket_BGA1284
subdirs-$(CONFIG_CPU_INTEL_SOCKET_FCBGA559) += socket_FCBGA559 subdirs-$(CONFIG_CPU_INTEL_SOCKET_FCBGA559) += socket_FCBGA559
subdirs-$(CONFIG_CPU_INTEL_SOCKET_MFCPGA478) += socket_mFCPGA478 subdirs-$(CONFIG_CPU_INTEL_SOCKET_M) += socket_m
subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA478MN) += socket_mPGA478MN subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA478MN) += socket_mPGA478MN
subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA604) += socket_mPGA604 subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA604) += socket_mPGA604
subdirs-$(CONFIG_NORTHBRIDGE_INTEL_NEHALEM) += model_2065x subdirs-$(CONFIG_NORTHBRIDGE_INTEL_NEHALEM) += model_2065x

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@ -1,7 +1,7 @@
config CPU_INTEL_SOCKET_MFCPGA478 config CPU_INTEL_SOCKET_M
bool bool
if CPU_INTEL_SOCKET_MFCPGA478 if CPU_INTEL_SOCKET_M
config SOCKET_SPECIFIC_OPTIONS # dummy config SOCKET_SPECIFIC_OPTIONS # dummy
def_bool y def_bool y

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@ -4,7 +4,7 @@ config BOARD_SPECIFIC_OPTIONS
def_bool y def_bool y
select SYSTEM_TYPE_LAPTOP select SYSTEM_TYPE_LAPTOP
select ARCH_X86 select ARCH_X86
select CPU_INTEL_SOCKET_MFCPGA478 select CPU_INTEL_SOCKET_M
select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_I945
select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select NORTHBRIDGE_INTEL_SUBTYPE_I945GM
select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_INTEL_I82801GX

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@ -30,7 +30,7 @@ chip northbridge/intel/i945
register "gpu_panel_power_cycle_delay" = "2" register "gpu_panel_power_cycle_delay" = "2"
device cpu_cluster 0 on device cpu_cluster 0 on
chip cpu/intel/socket_mFCPGA478 chip cpu/intel/socket_m
device lapic 0 on end device lapic 0 on end
end end
end end

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@ -17,7 +17,7 @@ if BOARD_GETAC_P470
config BOARD_SPECIFIC_OPTIONS config BOARD_SPECIFIC_OPTIONS
def_bool y def_bool y
select SYSTEM_TYPE_LAPTOP select SYSTEM_TYPE_LAPTOP
select CPU_INTEL_SOCKET_MFCPGA478 select CPU_INTEL_SOCKET_M
select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_I945
select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select NORTHBRIDGE_INTEL_SUBTYPE_I945GM
select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_INTEL_I82801GX

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@ -20,7 +20,7 @@ chip northbridge/intel/i945
register "gfx.did" = "{ 0x80000100, 0x80000410, 0x80000320, 0x80000410, 0x00000005 }" register "gfx.did" = "{ 0x80000100, 0x80000410, 0x80000320, 0x80000410, 0x00000005 }"
device cpu_cluster 0 on device cpu_cluster 0 on
chip cpu/intel/socket_mFCPGA478 chip cpu/intel/socket_m
device lapic 0 on end device lapic 0 on end
end end
end end

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@ -2,7 +2,7 @@ if BOARD_IBASE_MB899
config BOARD_SPECIFIC_OPTIONS config BOARD_SPECIFIC_OPTIONS
def_bool y def_bool y
select CPU_INTEL_SOCKET_MFCPGA478 select CPU_INTEL_SOCKET_M
select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_I945
select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select NORTHBRIDGE_INTEL_SUBTYPE_I945GM
select CHECK_SLFRCS_ON_RESUME select CHECK_SLFRCS_ON_RESUME

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@ -4,7 +4,7 @@ chip northbridge/intel/i945
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }" register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
device cpu_cluster 0 on device cpu_cluster 0 on
chip cpu/intel/socket_mFCPGA478 chip cpu/intel/socket_m
device lapic 0 on end device lapic 0 on end
end end
end end

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@ -2,7 +2,7 @@ if BOARD_KONTRON_986LCD_M
config BOARD_SPECIFIC_OPTIONS config BOARD_SPECIFIC_OPTIONS
def_bool y def_bool y
select CPU_INTEL_SOCKET_MFCPGA478 select CPU_INTEL_SOCKET_M
select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_I945
select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select NORTHBRIDGE_INTEL_SUBTYPE_I945GM
select CHECK_SLFRCS_ON_RESUME select CHECK_SLFRCS_ON_RESUME

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@ -4,7 +4,7 @@ chip northbridge/intel/i945
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }" register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
device cpu_cluster 0 on device cpu_cluster 0 on
chip cpu/intel/socket_mFCPGA478 chip cpu/intel/socket_m
device lapic 0 on end device lapic 0 on end
end end
end end

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@ -3,7 +3,7 @@ if BOARD_LENOVO_T60
config BOARD_SPECIFIC_OPTIONS config BOARD_SPECIFIC_OPTIONS
def_bool y def_bool y
select SYSTEM_TYPE_LAPTOP select SYSTEM_TYPE_LAPTOP
select CPU_INTEL_SOCKET_MFCPGA478 select CPU_INTEL_SOCKET_M
select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_I945
select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select NORTHBRIDGE_INTEL_SUBTYPE_I945GM
select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_INTEL_I82801GX

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@ -30,7 +30,7 @@ chip northbridge/intel/i945
register "gpu_panel_power_cycle_delay" = "2" register "gpu_panel_power_cycle_delay" = "2"
device cpu_cluster 0 on device cpu_cluster 0 on
chip cpu/intel/socket_mFCPGA478 chip cpu/intel/socket_m
device lapic 0 on end device lapic 0 on end
end end
end end

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@ -3,7 +3,7 @@ if BOARD_LENOVO_X60
config BOARD_SPECIFIC_OPTIONS config BOARD_SPECIFIC_OPTIONS
def_bool y def_bool y
select SYSTEM_TYPE_LAPTOP select SYSTEM_TYPE_LAPTOP
select CPU_INTEL_SOCKET_MFCPGA478 select CPU_INTEL_SOCKET_M
select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_I945
select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select NORTHBRIDGE_INTEL_SUBTYPE_I945GM
select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_INTEL_I82801GX

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@ -30,7 +30,7 @@ chip northbridge/intel/i945
register "gpu_panel_power_cycle_delay" = "2" register "gpu_panel_power_cycle_delay" = "2"
device cpu_cluster 0 on device cpu_cluster 0 on
chip cpu/intel/socket_mFCPGA478 chip cpu/intel/socket_m
device lapic 0 on end device lapic 0 on end
end end
end end

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@ -3,7 +3,7 @@ if BOARD_LENOVO_Z61T
config BOARD_SPECIFIC_OPTIONS config BOARD_SPECIFIC_OPTIONS
def_bool y def_bool y
select SYSTEM_TYPE_LAPTOP select SYSTEM_TYPE_LAPTOP
select CPU_INTEL_SOCKET_MFCPGA478 select CPU_INTEL_SOCKET_M
select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_I945
select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select NORTHBRIDGE_INTEL_SUBTYPE_I945GM
select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_INTEL_I82801GX

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@ -30,7 +30,7 @@ chip northbridge/intel/i945
register "gpu_panel_power_cycle_delay" = "2" register "gpu_panel_power_cycle_delay" = "2"
device cpu_cluster 0 on device cpu_cluster 0 on
chip cpu/intel/socket_mFCPGA478 chip cpu/intel/socket_m
device lapic 0 on end device lapic 0 on end
end end
end end

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@ -3,7 +3,7 @@ if BOARD_RODA_RK886EX
config BOARD_SPECIFIC_OPTIONS config BOARD_SPECIFIC_OPTIONS
def_bool y def_bool y
select SYSTEM_TYPE_LAPTOP select SYSTEM_TYPE_LAPTOP
select CPU_INTEL_SOCKET_MFCPGA478 select CPU_INTEL_SOCKET_M
select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_I945
select NORTHBRIDGE_INTEL_SUBTYPE_I945GM select NORTHBRIDGE_INTEL_SUBTYPE_I945GM
select SOUTHBRIDGE_INTEL_I82801GX select SOUTHBRIDGE_INTEL_I82801GX

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@ -20,7 +20,7 @@ chip northbridge/intel/i945
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }" register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
device cpu_cluster 0 on device cpu_cluster 0 on
chip cpu/intel/socket_mFCPGA478 chip cpu/intel/socket_m
device lapic 0 on end device lapic 0 on end
end end
end end

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@ -323,9 +323,9 @@ EOF
INTEL_SOCKET_MPGA604) INTEL_SOCKET_MPGA604)
cpu_nice="Intel® Xeon®"; cpu_nice="Intel® Xeon®";
socket_nice="Socket 604";; socket_nice="Socket 604";;
INTEL_SOCKET_MFCPGA478) INTEL_SOCKET_M)
cpu_nice="Intel® Core™ 2 Duo Mobile, Core™ Duo/Solo, Celeron® M"; cpu_nice="Intel® Core™ 2 Duo Mobile, Core™ Duo/Solo, Celeron® M";
socket_nice="Socket mPGA478";; socket_nice="Socket M (mPGA478MT)";;
INTEL_SOCKET_LGA771) INTEL_SOCKET_LGA771)
cpu_nice="Intel Xeon™ 5000 series"; cpu_nice="Intel Xeon™ 5000 series";
socket_nice="Socket LGA771";; socket_nice="Socket LGA771";;