binaryPI boards: Bulk remove BINARYPI_LEGACY_WRAPPER remains
These boards currently have no build-testing, so they degrade fast. Apply some of the build-tested changes we know to be good from pcengines/apu2 to get them a bit closer to using POSTCAR_STAGE=y. Change-Id: Ibc9a15ed5e91c6dd857f2dd02e37d0979dd6ae90 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37373 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
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@ -38,30 +38,11 @@ static void romstage_main_template(void)
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post_code(0x31);
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console_init();
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}
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/* Load MPB */
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val = cpuid_eax(1);
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printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
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printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
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post_code(0x37);
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AGESAWRAPPER(amdinitreset);
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post_code(0x38);
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printk(BIOS_DEBUG, "Got past agesawrapper_amdinitreset\n");
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post_code(0x39);
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AGESAWRAPPER(amdinitearly);
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post_code(0x40);
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AGESAWRAPPER(amdinitpost);
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}
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void agesa_postcar(struct sysinfo *cb)
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{
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post_code(0x41);
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AGESAWRAPPER(amdinitenv);
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/* After AMD_INIT_ENV -> move to ramstage ? */
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if (acpi_is_wakeup_s4()) {
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outb(0xEE, PM_INDEX);
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outb(0x8, PM_DATA);
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@ -43,30 +43,11 @@ static void romstage_main_template(void)
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post_code(0x31);
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console_init();
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}
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/* Load MPB */
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val = cpuid_eax(1);
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printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
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printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
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post_code(0x37);
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AGESAWRAPPER(amdinitreset);
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post_code(0x38);
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printk(BIOS_DEBUG, "Got past avalon_early_setup\n");
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post_code(0x39);
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AGESAWRAPPER(amdinitearly);
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post_code(0x40);
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AGESAWRAPPER(amdinitpost);
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}
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void agesa_postcar(struct sysinfo *cb)
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{
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post_code(0x41);
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AGESAWRAPPER(amdinitenv);
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/* After AMD_INIT_ENV -> move to ramstage ? */
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outb(0xEA, 0xCD6);
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outb(0x1, 0xcd7);
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}
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@ -54,26 +54,4 @@ static void romstage_main_template(void)
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post_code(0x31);
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console_init();
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}
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/* Load MPB */
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val = cpuid_eax(1);
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printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
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printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
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post_code(0x37);
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AGESAWRAPPER(amdinitreset);
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post_code(0x38);
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printk(BIOS_DEBUG, "Got past hudson_early_setup\n");
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post_code(0x39);
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AGESAWRAPPER(amdinitearly);
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post_code(0x40);
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AGESAWRAPPER(amdinitpost);
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}
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void agesa_postcar(struct sysinfo *cb)
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{
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post_code(0x41);
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AGESAWRAPPER(amdinitenv);
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}
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@ -59,26 +59,11 @@ static void romstage_main_template(void)
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for (i = 0; i < 200000; i++)
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inb(0xCD6);
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}
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post_code(0x37);
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AGESAWRAPPER(amdinitreset);
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post_code(0x38);
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printk(BIOS_DEBUG, "Got past avalon_early_setup\n");
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post_code(0x39);
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AGESAWRAPPER(amdinitearly);
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post_code(0x40);
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AGESAWRAPPER(amdinitpost);
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}
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void agesa_postcar(struct sysinfo *cb)
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{
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//PspMboxBiosCmdDramInfo();
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post_code(0x41);
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AGESAWRAPPER(amdinitenv);
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/* After AMD_INIT_ENV -> move to ramstage ? */
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outb(0xEA, 0xCD6);
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outb(0x1, 0xcd7);
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}
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@ -47,31 +47,11 @@ static void romstage_main_template(void)
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post_code(0x31);
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console_init();
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}
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/* Load MPB */
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val = cpuid_eax(1);
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printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
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printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
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post_code(0x37);
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AGESAWRAPPER(amdinitreset);
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post_code(0x38);
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printk(BIOS_DEBUG, "Got past avalon_early_setup\n");
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post_code(0x39);
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AGESAWRAPPER(amdinitearly);
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post_code(0x40);
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AGESAWRAPPER(amdinitpost);
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}
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void agesa_postcar(struct sysinfo *cb)
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{
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//PspMboxBiosCmdDramInfo();
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post_code(0x41);
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AGESAWRAPPER(amdinitenv);
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/* After AMD_INIT_ENV -> move to ramstage ? */
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outb(0xEA, 0xCD6);
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outb(0x1, 0xcd7);
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}
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@ -44,9 +44,6 @@ struct sysinfo
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int s3resume;
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};
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void agesa_main(struct sysinfo *cb);
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void agesa_postcar(struct sysinfo *cb);
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void board_BeforeAgesa(struct sysinfo *cb);
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void platform_once(struct sysinfo *cb);
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