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binaryPI boards: Bulk remove BINARYPI_LEGACY_WRAPPER remains 

These boards currently have no build-testing, so they degrade
fast. Apply some of the build-tested changes we know to be
good from pcengines/apu2 to get them a bit closer to using
POSTCAR_STAGE=y.

Change-Id: Ibc9a15ed5e91c6dd857f2dd02e37d0979dd6ae90
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37373
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
This commit is contained in:
Kyösti Mälkki 2019-11-30 08:18:55 +02:00
parent 3979def529
commit 4841203c3a
6 changed files with 4 additions and 102 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
src/mainboard/amd/bettong/romstage.c
View File

@ -38,30 +38,11 @@ static void romstage_main_template(void)
post_code(0x31); post_code(0x31);
console_init(); console_init();
} }
/* Load MPB */
val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
post_code(0x37);
AGESAWRAPPER(amdinitreset);
post_code(0x38);
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitreset\n");
post_code(0x39);
AGESAWRAPPER(amdinitearly);
post_code(0x40);
AGESAWRAPPER(amdinitpost);
} }
void agesa_postcar(struct sysinfo *cb) void agesa_postcar(struct sysinfo *cb)
{ {
post_code(0x41); /* After AMD_INIT_ENV -> move to ramstage ? */
AGESAWRAPPER(amdinitenv);
if (acpi_is_wakeup_s4()) { if (acpi_is_wakeup_s4()) {
outb(0xEE, PM_INDEX); outb(0xEE, PM_INDEX);
outb(0x8, PM_DATA); outb(0x8, PM_DATA);

21
src/mainboard/amd/db-ft3b-lc/romstage.c
View File

@ -43,30 +43,11 @@ static void romstage_main_template(void)
post_code(0x31); post_code(0x31);
console_init(); console_init();
} }
/* Load MPB */
val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
post_code(0x37);
AGESAWRAPPER(amdinitreset);
post_code(0x38);
printk(BIOS_DEBUG, "Got past avalon_early_setup\n");
post_code(0x39);
AGESAWRAPPER(amdinitearly);
post_code(0x40);
AGESAWRAPPER(amdinitpost);
} }
void agesa_postcar(struct sysinfo *cb) void agesa_postcar(struct sysinfo *cb)
{ {
post_code(0x41); /* After AMD_INIT_ENV -> move to ramstage ? */
AGESAWRAPPER(amdinitenv);
outb(0xEA, 0xCD6); outb(0xEA, 0xCD6);
outb(0x1, 0xcd7); outb(0x1, 0xcd7);
} }

22
src/mainboard/amd/lamar/romstage.c
View File

@ -54,26 +54,4 @@ static void romstage_main_template(void)
post_code(0x31); post_code(0x31);
console_init(); console_init();
} }
/* Load MPB */
val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
post_code(0x37);
AGESAWRAPPER(amdinitreset);
post_code(0x38);
printk(BIOS_DEBUG, "Got past hudson_early_setup\n");
post_code(0x39);
AGESAWRAPPER(amdinitearly);
post_code(0x40);
AGESAWRAPPER(amdinitpost);
}
void agesa_postcar(struct sysinfo *cb)
{
post_code(0x41);
AGESAWRAPPER(amdinitenv);
} }

17
src/mainboard/amd/olivehillplus/romstage.c
View File

@ -59,26 +59,11 @@ static void romstage_main_template(void)
for (i = 0; i < 200000; i++) for (i = 0; i < 200000; i++)
inb(0xCD6); inb(0xCD6);
} }
post_code(0x37);
AGESAWRAPPER(amdinitreset);
post_code(0x38);
printk(BIOS_DEBUG, "Got past avalon_early_setup\n");
post_code(0x39);
AGESAWRAPPER(amdinitearly);
post_code(0x40);
AGESAWRAPPER(amdinitpost);
} }
void agesa_postcar(struct sysinfo *cb) void agesa_postcar(struct sysinfo *cb)
{ {
//PspMboxBiosCmdDramInfo(); /* After AMD_INIT_ENV -> move to ramstage ? */
post_code(0x41);
AGESAWRAPPER(amdinitenv);
outb(0xEA, 0xCD6); outb(0xEA, 0xCD6);
outb(0x1, 0xcd7); outb(0x1, 0xcd7);
} }

22
src/mainboard/bap/ode_e21XX/romstage.c
View File

@ -47,31 +47,11 @@ static void romstage_main_template(void)
post_code(0x31); post_code(0x31);
console_init(); console_init();
} }
/* Load MPB */
val = cpuid_eax(1);
printk(BIOS_DEBUG, "BSP Family_Model: %08x\n", val);
printk(BIOS_DEBUG, "cpu_init_detectedx = %08lx\n", cpu_init_detectedx);
post_code(0x37);
AGESAWRAPPER(amdinitreset);
post_code(0x38);
printk(BIOS_DEBUG, "Got past avalon_early_setup\n");
post_code(0x39);
AGESAWRAPPER(amdinitearly);
post_code(0x40);
AGESAWRAPPER(amdinitpost);
} }
void agesa_postcar(struct sysinfo *cb) void agesa_postcar(struct sysinfo *cb)
{ {
//PspMboxBiosCmdDramInfo(); /* After AMD_INIT_ENV -> move to ramstage ? */
post_code(0x41);
AGESAWRAPPER(amdinitenv);
outb(0xEA, 0xCD6); outb(0xEA, 0xCD6);
outb(0x1, 0xcd7); outb(0x1, 0xcd7);
} }

3
src/northbridge/amd/agesa/state_machine.h
View File

@ -44,9 +44,6 @@ struct sysinfo
int s3resume; int s3resume;
}; };
void agesa_main(struct sysinfo *cb);
void agesa_postcar(struct sysinfo *cb);
void board_BeforeAgesa(struct sysinfo *cb); void board_BeforeAgesa(struct sysinfo *cb);
void platform_once(struct sysinfo *cb); void platform_once(struct sysinfo *cb);