mb/google/zork: Drop mainboard_ec_init() from romstage

mainboard_ec_init() does nothing in any stage other than ramstage. So,
this change drops the call to mainboard_ec_init() from
romstage.c. Additionally, it also drops ec.c from romstage and
verstage.

Change-Id: Iae0be4d678b0780cf532000a6c0fff1bce333c0e
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43117
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/google/zork/Makefile.inc

@@ -3,7 +3,6 @@
 bootblock-y += bootblock.c
 
 romstage-y += chromeos.c
-romstage-y += ec.c
 romstage-y += sku_id.c
 
 ramstage-y += chromeos.c
@@ -14,7 +13,6 @@ ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y)
 verstage-y += verstage.c
 else
 verstage-y += chromeos.c
-verstage-y += ec.c
 endif
 
 smm-y += smihandler.c

src/mainboard/google/zork/romstage.c

@@ -1,11 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <baseboard/variants.h>
-#include <ec/ec.h>
-#include <ec/google/chromeec/ec.h>
 #include <soc/gpio.h>
 #include <soc/romstage.h>
-#include <variant/ec.h>
 #include <console/console.h>
 
 void mainboard_romstage_entry_s3(int s3_resume)
@@ -16,6 +13,4 @@ void mainboard_romstage_entry_s3(int s3_resume)
 	gpios = variant_romstage_gpio_table(&num_gpios);
 	program_gpios(gpios, num_gpios);
 	variant_pcie_power_reset_configure();
-
-	mainboard_ec_init();
 }