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src/vendorcode/intel: Update Comet Lake FSP headers as per FSP v1394 

"EnforceEDebugMode" UPD added in FSP_S_TEST_CONFIG

Change-Id: I1583d8583db20b29505e5a7ae4084013334c87c2
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35852
Reviewed-by: Shelley Chen <shchen@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Ronak Kanabar 2019-10-07 19:01:05 +05:30 committed by Shelley Chen
parent 6536084163
commit 489c10ee54
1 changed files with 57 additions and 47 deletions
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18
src/vendorcode/intel/fsp/fsp2_0/cometlake/FspsUpd.h
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@ -3621,7 +3621,17 @@ typedef struct {
**/
UINT32 SdCardRxCmdDataDelay2RegValue;
/** Offset 0x0ABC
/** Offset 0x0ABC - Enforce Enhanced Debug Mode
Determine if ME should enter Enhanced Debug Mode. 0: disable, 1: enable
$EN_DIS
**/
UINT8 EnforceEDebugMode;
/** Offset 0x0ABD
**/
UINT8 UnusedUpdSpace31[7];
/** Offset 0x0AC4
**/
UINT8 ReservedFspsTestUpd[12];
} FSP_S_TEST_CONFIG;
@ -3642,11 +3652,11 @@ typedef struct {
**/
FSP_S_TEST_CONFIG FspsTestConfig;
/** Offset 0x0AC8
/** Offset 0x0AD0
**/
UINT8 UnusedUpdSpace31[6];
UINT8 UnusedUpdSpace32[6];
/** Offset 0x0ACE
/** Offset 0x0AD6
**/
UINT16 UpdTerminator;
} FSPS_UPD;