From 48bd8577895bdd0ff86f22010a74e13ffa620425 Mon Sep 17 00:00:00 2001 From: Kevin Chiu Date: Mon, 18 Oct 2021 16:39:20 +0800 Subject: [PATCH] mb/google/guybrush/var/nipperkin: Enable GPP2 for NVMe bridge eMMC storage BUG=b:195269555 BRANCH=guybrush TEST=emerge-guybrush coreboot chromeos-bootimage eMMC sku is bootable Signed-off-by: Kevin Chiu Change-Id: If9e0fdc1667cbaac05fdf4c6689d47a561016c9e Reviewed-on: https://review.coreboot.org/c/coreboot/+/58413 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel Reviewed-by: Karthik Ramasubramanian --- .../google/guybrush/variants/nipperkin/overridetree.cb | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb b/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb index 77e35bc59f..ef577bb6f2 100644 --- a/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb +++ b/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb @@ -34,6 +34,15 @@ chip soc/amd/cezanne register "name" = ""NVME"" device pci 00.0 on end end + probe STORAGE STORAGE_EMMC + end # EMMC + device ref gpp_bridge_3 on + # Required so the NVMe gets placed into D3 when entering S0i3. + chip drivers/pcie/rtd3/device + register "name" = ""NVME"" + device pci 00.0 on end + end + probe STORAGE STORAGE_SSD end # NVMe device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A device ref acp on