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mb/google/brya/var/redrix: Disable PCH USB2 phy power gating 

The patch disables PCH USB2 Phy power gating to prevent possible display
flicker issue for redrix board. Please refer Intel doc#723158 for
more information.

BUG=b:292435264
TEST=build and boot redrix

Change-Id: I34d10c763f4710d2c5678704320fd1cc8d8b6287
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76670
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Wisley Chen 2023-07-24 08:34:35 +06:00 committed by Felix Held
parent 2d2815a7c2
commit 48c1bf491b
1 changed files with 5 additions and 0 deletions
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5
src/mainboard/google/brya/variants/redrix/overridetree.cb
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@ -32,6 +32,11 @@ fw_config
end end
chip soc/intel/alderlake chip soc/intel/alderlake
register "sagv" = "SaGv_Enabled" register "sagv" = "SaGv_Enabled"
# As per Intel Advisory doc#723158, the change is required to prevent possible
# display flickering issue.
register "usb2_phy_sus_pg_disable" = "1"
register "cnvi_bt_audio_offload" = "true" register "cnvi_bt_audio_offload" = "true"
# FIVR RFI Spread Spectrum 6% # FIVR RFI Spread Spectrum 6%
register "fivr_spread_spectrum" = "FIVR_SS_6" register "fivr_spread_spectrum" = "FIVR_SS_6"