cpu/x86/mp_init.c: Use linked list data structures
There is no need to keep track of device structures separately. Change-Id: Ie728110fc8c60fec94ae4bedf74e17740cf78f67 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64340 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
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@ -107,7 +107,7 @@ struct saved_msr {
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/* The sipi vector rmodule is included in the ramstage using 'objdump -B'. */
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extern char _binary_sipi_vector_start[];
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/* The SIPI vector is loaded at the SMM_DEFAULT_BASE. The reason is at the
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/* The SIPI vector is loaded at the SMM_DEFAULT_BASE. The reason is that the
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* memory range is already reserved so the OS cannot use it. That region is
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* free to use for AP bringup before SMM is initialized. */
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static const uintptr_t sipi_vector_location = SMM_DEFAULT_BASE;
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@ -121,9 +121,6 @@ struct mp_flight_plan {
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static int global_num_aps;
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static struct mp_flight_plan mp_info;
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/* Keep track of device structure for each CPU. */
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static struct device *cpus_dev[CONFIG_MAX_CPUS];
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static inline void barrier_wait(atomic_t *b)
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{
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while (atomic_read(b) == 0)
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@ -175,6 +172,8 @@ static void park_this_cpu(void *unused)
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stop_this_cpu();
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}
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static struct bus *g_cpu_bus;
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/* By the time APs call ap_init() caching has been setup, and microcode has
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* been loaded. */
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static void asmlinkage ap_init(void)
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@ -185,7 +184,11 @@ static void asmlinkage ap_init(void)
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enable_lapic();
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setup_lapic_interrupts();
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info->cpu = cpus_dev[info->index];
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struct device *dev = g_cpu_bus->children;
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for (unsigned int i = info->index; i > 0; i--)
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dev = dev->sibling;
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info->cpu = dev;
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cpu_add_map_entry(info->index);
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@ -384,7 +387,6 @@ static int allocate_cpu_devices(struct bus *cpu_bus, struct mp_params *p)
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continue;
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}
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new->name = processor_name;
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cpus_dev[i] = new;
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}
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return max_cpus;
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@ -579,6 +581,8 @@ static enum cb_err mp_init(struct bus *cpu_bus, struct mp_params *p)
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int num_cpus;
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atomic_t *ap_count;
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g_cpu_bus = cpu_bus;
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init_bsp(cpu_bus);
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if (p == NULL || p->flight_plan == NULL || p->num_records < 1) {
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