soc/intel/apollolake: Enable SATA Power Optimisation

Enable PwrOptEnable FSP S UPD and hook it to the inverted value of
SataPwrOptimizeDisable to allow it to be disabled from the devicetree.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I056fd7b16dadb213b3326523b0c7943ce35b8dc4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65043
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
This commit is contained in:
Sean Rhodes 2022-06-08 21:30:26 +01:00 committed by Felix Held
parent ad07461a16
commit 48f69da67b
2 changed files with 6 additions and 0 deletions

View File

@ -734,6 +734,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
sizeof(silconfig->SataPortsEnable)); sizeof(silconfig->SataPortsEnable));
} }
/* Sata Power Optimisation */
silconfig->SataPwrOptEnable = !(cfg->SataPwrOptimizeDisable);
/* 8254 Timer */ /* 8254 Timer */
bool use_8254 = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER)); bool use_8254 = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER));
silconfig->Timer8254ClkSetting = use_8254; silconfig->Timer8254ClkSetting = use_8254;

View File

@ -212,6 +212,9 @@ struct soc_intel_apollolake_config {
/* SATA Aggressive Link Power Management */ /* SATA Aggressive Link Power Management */
uint8_t DisableSataSalpSupport; uint8_t DisableSataSalpSupport;
/* Sata Power Optimisation */
uint8_t SataPwrOptimizeDisable;
}; };
typedef struct soc_intel_apollolake_config config_t; typedef struct soc_intel_apollolake_config config_t;