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drivers/i2c/generic: Drop 'disable_gpio_export_in_crs' flag 

Exposing the GPIOs via an ACPI PowerResource and the _CRS results in the
OS driver and ACPI thinking they own the GPIO. This can cause timing
problems because it's not clear which system should be controlling the
GPIO.

Previously, we flagged as an error any device which set the
'has_power_resource' flag but did not set 'disable_gpio_export_in_crs.'
There's no reason to require explicit disablement however, so drop the
superfluous 'disable' flag, and change the _CRS generation to check if
the GPIOs will be exported via the 'has_power_resource' flag instead.

BUG=b:265055477
TEST=build/boot skyrim, dump SSDT and verify touchscreen GPIOs only
listed under PRx, not under _CRS.

Change-Id: I837ae6c6fe4b8e1c4e10686406cba06bdb7759d2
Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71849
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
This commit is contained in:
Matt DeVillier 2023-01-11 17:41:37 -06:00 committed by Martin L Roth
parent 2e6c55946c
commit 4902e9b35f
95 changed files with 2 additions and 141 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/drivers/i2c/generic/chip.h
View File

@ -46,9 +46,6 @@ struct drivers_i2c_generic_config {
unsigned int device_present_gpio;
unsigned int device_present_gpio_invert;
/* Disable reset and enable GPIO export in _CRS */
bool disable_gpio_export_in_crs;
/* Does the device have a power resource? */
bool has_power_resource;

14
src/drivers/i2c/generic/generic.c
View File

@ -17,10 +17,10 @@ static bool i2c_generic_add_gpios_to_crs(struct drivers_i2c_generic_config *cfg)
{
/*
* Return false if:
* 1. Request to explicitly disable export of GPIOs in CRS, or
* 1. GPIOs are exported via a power resource, or
* 2. Both reset and enable GPIOs are not provided.
*/
if (cfg->disable_gpio_export_in_crs ||
if (cfg->has_power_resource ||
((cfg->reset_gpio.pin_count == 0) &&
(cfg->enable_gpio.pin_count == 0)))
return false;
@ -77,16 +77,6 @@ void i2c_generic_fill_ssdt(const struct device *dev,
}
}
if (config->has_power_resource && !config->disable_gpio_export_in_crs) {
/*
* This case will most likely cause timing problems. The OS driver might be
* controlling the GPIOs, but the ACPI Power Resource will also be controlling
* them. This will result in the two fighting and stomping on each other.
*/
printk(BIOS_ERR, "%s: Exposing GPIOs in Power Resource and _CRS\n",
dev_path(dev));
}
/* Device */
acpigen_write_scope(scope);
acpigen_write_device(acpi_device_name(dev));

2
src/mainboard/google/brya/variants/anahera/overridetree.cb
View File

@ -237,7 +237,6 @@ chip soc/intel/alderlake
register "stop_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 10 on end
end
chip drivers/i2c/hid
@ -252,7 +251,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

2
src/mainboard/google/brya/variants/anahera4es/overridetree.cb
View File

@ -217,7 +217,6 @@ chip soc/intel/alderlake
register "stop_gpio" =
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 10 on end
end
chip drivers/i2c/hid
@ -232,7 +231,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

2
src/mainboard/google/brya/variants/craask/overridetree.cb
View File

@ -201,7 +201,6 @@ chip soc/intel/alderlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
register "generic.enable_delay_ms" = "12"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 0x40 on end
end
@ -233,7 +232,6 @@ chip soc/intel/alderlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

1
src/mainboard/google/brya/variants/crota/overridetree.cb
View File

@ -256,7 +256,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 0x16 on end
end

1
src/mainboard/google/brya/variants/felwinter/overridetree.cb
View File

@ -280,7 +280,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

1
src/mainboard/google/brya/variants/gimble/overridetree.cb
View File

@ -213,7 +213,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 0x15 on end
end

1
src/mainboard/google/brya/variants/gimble4es/overridetree.cb
View File

@ -170,7 +170,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 0x15 on end
end

1
src/mainboard/google/brya/variants/kano/overridetree.cb
View File

@ -410,7 +410,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 0x10 on end
end

1
src/mainboard/google/brya/variants/mithrax/overridetree.cb
View File

@ -234,7 +234,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

1
src/mainboard/google/brya/variants/nivviks/overridetree.cb
View File

@ -303,7 +303,6 @@ chip soc/intel/alderlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 15 on end
end

2
src/mainboard/google/brya/variants/primus/overridetree.cb
View File

@ -234,7 +234,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 0x10 on end
end
@ -250,7 +249,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 0x40 on end
end

2
src/mainboard/google/brya/variants/primus4es/overridetree.cb
View File

@ -217,7 +217,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 0x10 on end
end
@ -233,7 +232,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 0x40 on end
end

2
src/mainboard/google/brya/variants/pujjo/overridetree.cb
View File

@ -353,7 +353,6 @@ chip soc/intel/alderlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end
@ -369,7 +368,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

1
src/mainboard/google/brya/variants/redrix/overridetree.cb
View File

@ -413,7 +413,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 0x15 on end
end

1
src/mainboard/google/brya/variants/redrix4es/overridetree.cb
View File

@ -297,7 +297,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 0x15 on end
end

2
src/mainboard/google/brya/variants/taeko/overridetree.cb
View File

@ -453,7 +453,6 @@ chip soc/intel/alderlake
# Parameter T4 >= 1ms
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 5d on end
end
@ -469,7 +468,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
register "enable_delay_ms" = "1"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 10 on end
end
end

2
src/mainboard/google/brya/variants/taeko4es/overridetree.cb
View File

@ -297,7 +297,6 @@ chip soc/intel/alderlake
# Parameter T4 >= 1ms
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 5d on end
end
@ -313,7 +312,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
register "enable_delay_ms" = "1"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 10 on end
end
end

1
src/mainboard/google/brya/variants/vell/overridetree.cb
View File

@ -310,7 +310,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 0x10 on end
end

1
src/mainboard/google/brya/variants/volmar/overridetree.cb
View File

@ -271,7 +271,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 0x10 on end
end

1
src/mainboard/google/brya/variants/xivu/overridetree.cb
View File

@ -225,7 +225,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

2
src/mainboard/google/brya/variants/yaviks/overridetree.cb
View File

@ -145,7 +145,6 @@ chip soc/intel/alderlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end
@ -161,7 +160,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

1
src/mainboard/google/brya/variants/zydron/overridetree.cb
View File

@ -410,7 +410,6 @@ chip soc/intel/alderlake
"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 0x10 on end
end

2
src/mainboard/google/dedede/variants/cret/overridetree.cb
View File

@ -172,7 +172,6 @@ chip soc/intel/jasperlake
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 2c on end
end
@ -243,7 +242,6 @@ chip soc/intel/jasperlake
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)"
register "generic.enable_delay_ms" = "30"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

2
src/mainboard/google/dedede/variants/drawcia/overridetree.cb
View File

@ -251,7 +251,6 @@ chip soc/intel/jasperlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end
@ -295,7 +294,6 @@ chip soc/intel/jasperlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)"
register "generic.enable_delay_ms" = "10"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 2c on end
end

1
src/mainboard/google/dedede/variants/haboki/overridetree.cb
View File

@ -176,7 +176,6 @@ chip soc/intel/jasperlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

2
src/mainboard/google/dedede/variants/lalala/overridetree.cb
View File

@ -164,7 +164,6 @@ chip soc/intel/jasperlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 15 on end
end
@ -190,7 +189,6 @@ chip soc/intel/jasperlake
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)"
register "enable_delay_ms" = "50"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 39 on end
end
end # I2C 2

1
src/mainboard/google/dedede/variants/lantis/overridetree.cb
View File

@ -211,7 +211,6 @@ chip soc/intel/jasperlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

5
src/mainboard/google/dedede/variants/magolor/overridetree.cb
View File

@ -216,7 +216,6 @@ chip soc/intel/jasperlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 15 on
probe TS_SOURCE TS_UNPROVISIONED
@ -237,7 +236,6 @@ chip soc/intel/jasperlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on
probe TS_SOURCE TS_ELAN_6918
@ -257,7 +255,6 @@ chip soc/intel/jasperlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on
probe TS_SOURCE TS_ELAN_9004
@ -275,7 +272,6 @@ chip soc/intel/jasperlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 2c on
probe TS_SOURCE TS_UNPROVISIONED
@ -324,7 +320,6 @@ chip soc/intel/jasperlake
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)"
register "enable_delay_ms" = "50"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 39 on
probe TS_SOURCE TS_UNPROVISIONED
probe TS_SOURCE TS_RAYD_0001

2
src/mainboard/google/dedede/variants/metaknight/overridetree.cb
View File

@ -204,7 +204,6 @@ chip soc/intel/jasperlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)"
register "generic.enable_delay_ms" = "12"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 0x5d on end
end
@ -222,7 +221,6 @@ chip soc/intel/jasperlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D6)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 15 on end
end

1
src/mainboard/google/dedede/variants/shotzo/overridetree.cb
View File

@ -185,7 +185,6 @@ chip soc/intel/jasperlake
register "generic.enable_delay_ms" = "12"
register "generic.wake" = "GPE0_DW2_04"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 41 on end
end

1
src/mainboard/google/drallion/variants/drallion/devicetree.cb
View File

@ -348,7 +348,6 @@ chip soc/intel/cannonlake
"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B21)"
register "generic.enable_delay_ms" = "55"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x1"
register "generic.device_present_gpio" = "GPP_B4"
register "generic.device_present_gpio_invert" = "1"

1
src/mainboard/google/guybrush/variants/dewatt/overridetree.cb
View File

@ -167,7 +167,6 @@ chip soc/amd/cezanne
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_68)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

1
src/mainboard/google/guybrush/variants/guybrush/overridetree.cb
View File

@ -103,7 +103,6 @@ chip soc/amd/cezanne
register "generic.stop_delay_ms" = "170"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 5d on end
end

1
src/mainboard/google/hatch/variants/dratini/overridetree.cb
View File

@ -93,7 +93,6 @@ chip soc/intel/cannonlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D9)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

1
src/mainboard/google/hatch/variants/jinlon/overridetree.cb
View File

@ -115,7 +115,6 @@ chip soc/intel/cannonlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D9)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

1
src/mainboard/google/hatch/variants/kohaku/overridetree.cb
View File

@ -177,7 +177,6 @@ chip soc/intel/cannonlake
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C12)"
register "enable_delay_ms" = "1" # 90 ns
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
register "detect" = "1"
device i2c 4b on end
end

1
src/mainboard/google/hatch/variants/nightfury/overridetree.cb
View File

@ -214,7 +214,6 @@ chip soc/intel/cannonlake
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)"
register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 0x10 on end
end

1
src/mainboard/google/kahlee/variants/aleena/overridetree.cb
View File

@ -57,7 +57,6 @@ chip soc/amd/stoneyridge
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"
register "enable_delay_ms" = "1"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 39 on end
end
end

2
src/mainboard/google/kahlee/variants/baseboard/devicetree.cb
View File

@ -94,7 +94,6 @@ chip soc/amd/stoneyridge
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"
register "enable_delay_ms" = "1"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 39 on end
end
chip drivers/i2c/generic
@ -107,7 +106,6 @@ chip soc/amd/stoneyridge
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"
register "enable_delay_ms" = "1"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 10 on end
end
end

2
src/mainboard/google/kahlee/variants/careena/overridetree.cb
View File

@ -66,7 +66,6 @@ chip soc/amd/stoneyridge
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"
register "enable_delay_ms" = "1"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 39 on end
end
chip drivers/i2c/hid
@ -79,7 +78,6 @@ chip soc/amd/stoneyridge
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

1
src/mainboard/google/kahlee/variants/grunt/overridetree.cb
View File

@ -45,7 +45,6 @@ chip soc/amd/stoneyridge
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"
register "enable_delay_ms" = "1"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 39 on end
end
end

3
src/mainboard/google/kahlee/variants/nuwani/overridetree.cb
View File

@ -69,7 +69,6 @@ chip soc/amd/stoneyridge
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"
register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end
@ -82,7 +81,6 @@ chip soc/amd/stoneyridge
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"
register "generic.reset_delay_ms" = "45"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 20 on end
end
@ -96,7 +94,6 @@ chip soc/amd/stoneyridge
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"
register "enable_delay_ms" = "1"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 39 on end
end
end

2
src/mainboard/google/kahlee/variants/treeya/overridetree.cb
View File

@ -86,7 +86,6 @@ chip soc/amd/stoneyridge
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"
register "generic.reset_delay_ms" = "45"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 20 on end
end
@ -100,7 +99,6 @@ chip soc/amd/stoneyridge
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"
register "enable_delay_ms" = "1"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 39 on end
end
end

1
src/mainboard/google/octopus/variants/ampton/overridetree.cb
View File

@ -132,7 +132,6 @@ chip soc/intel/apollolake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

1
src/mainboard/google/octopus/variants/bloog/overridetree.cb
View File

@ -161,7 +161,6 @@ chip soc/intel/apollolake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

1
src/mainboard/google/octopus/variants/bobba/overridetree.cb
View File

@ -220,7 +220,6 @@ chip soc/intel/apollolake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

1
src/mainboard/google/octopus/variants/dood/overridetree.cb
View File

@ -155,7 +155,6 @@ chip soc/intel/apollolake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

2
src/mainboard/google/octopus/variants/fleex/overridetree.cb
View File

@ -194,7 +194,6 @@ chip soc/intel/apollolake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
register "generic.enable_delay_ms" = "2"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 2c on end
end
@ -208,7 +207,6 @@ chip soc/intel/apollolake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

2
src/mainboard/google/octopus/variants/foob/overridetree.cb
View File

@ -144,7 +144,6 @@ chip soc/intel/apollolake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end
@ -157,7 +156,6 @@ chip soc/intel/apollolake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
register "generic.reset_delay_ms" = "45"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 20 on end
end

1
src/mainboard/google/octopus/variants/garg/overridetree.cb
View File

@ -197,7 +197,6 @@ chip soc/intel/apollolake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

2
src/mainboard/google/octopus/variants/meep/overridetree.cb
View File

@ -228,7 +228,6 @@ chip soc/intel/apollolake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 2c on end
end
@ -242,7 +241,6 @@ chip soc/intel/apollolake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

2
src/mainboard/google/octopus/variants/phaser/overridetree.cb
View File

@ -170,7 +170,6 @@ chip soc/intel/apollolake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
register "generic.reset_delay_ms" = "45"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 20 on end
end
@ -196,7 +195,6 @@ chip soc/intel/apollolake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
register "generic.reset_delay_ms" = "70"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

1
src/mainboard/google/poppy/variants/atlas/devicetree.cb
View File

@ -270,7 +270,6 @@ chip soc/intel/skylake
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)"
register "generic.speed" = "I2C_SPEED_FAST"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C22)"
# 2ms for load switch slew + 5 ms for touchscreen
register "generic.enable_delay_ms" = "7"

1
src/mainboard/google/poppy/variants/baseboard/devicetree.cb
View File

@ -280,7 +280,6 @@ chip soc/intel/skylake
register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)"
register "detect" = "1"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C22)"
register "enable_delay_ms" = "250"
device i2c 4b on end

3
src/mainboard/google/poppy/variants/nami/devicetree.cb
View File

@ -318,7 +318,6 @@ chip soc/intel/skylake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B4)"
register "generic.enable_delay_ms" = "45"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 20 on end
end
@ -332,7 +331,6 @@ chip soc/intel/skylake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B4)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end
@ -366,7 +364,6 @@ chip soc/intel/skylake
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D3)"
register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "generic.wake" = "GPE0_DW2_01"
register "hid_desc_reg_offset" = "0x1"
device i2c 0x9 on end

2
src/mainboard/google/poppy/variants/nautilus/devicetree.cb
View File

@ -292,7 +292,6 @@ chip soc/intel/skylake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C22)"
register "generic.enable_delay_ms" = "45"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 20 on end
end
@ -322,7 +321,6 @@ chip soc/intel/skylake
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A22_IRQ)"
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C9)"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "generic.wake" = "GPE0_DW0_21"
register "generic.detect" = "1"
register "hid_desc_reg_offset" = "0x1"

1
src/mainboard/google/poppy/variants/nocturne/devicetree.cb
View File

@ -296,7 +296,6 @@ chip soc/intel/skylake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C22)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x1"
device i2c 0a on end
end

1
src/mainboard/google/poppy/variants/rammus/devicetree.cb
View File

@ -286,7 +286,6 @@ chip soc/intel/skylake
register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E3)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x0"
device i2c 5c on end
end

1
src/mainboard/google/poppy/variants/soraka/devicetree.cb
View File

@ -274,7 +274,6 @@ chip soc/intel/skylake
register "generic.enable_delay_ms" = "1"
register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E11)"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x1"
device i2c 0xA on end
end

1
src/mainboard/google/puff/variants/dooly/overridetree.cb
View File

@ -337,7 +337,6 @@ chip soc/intel/cannonlake
register "generic.reset_delay_ms" = "100"
register "generic.wake" = "GPE0_DW0_20"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 2c on end
end

1
src/mainboard/google/puff/variants/scout/overridetree.cb
View File

@ -391,7 +391,6 @@ chip soc/intel/cannonlake
register "generic.reset_delay_ms" = "600"
register "generic.wake" = "GPE0_DW2_16"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 41 on end
end

1
src/mainboard/google/reef/variants/pyro/devicetree.cb
View File

@ -204,7 +204,6 @@ chip soc/intel/apollolake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_152)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x1"
device i2c 0xA on end
end

2
src/mainboard/google/reef/variants/snappy/devicetree.cb
View File

@ -245,7 +245,6 @@ chip soc/intel/apollolake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_152)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 2c on end
end
@ -259,7 +258,6 @@ chip soc/intel/apollolake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_152)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

1
src/mainboard/google/rex/variants/rex0/overridetree.cb
View File

@ -361,7 +361,6 @@ chip soc/intel/meteorlake
register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C06)"
register "generic.stop_off_delay_ms" = "2"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

1
src/mainboard/google/sarien/variants/arcada/devicetree.cb
View File

@ -318,7 +318,6 @@ chip soc/intel/cannonlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B21)"
register "generic.enable_delay_ms" = "55"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x1"
device i2c 0A on end
end

1
src/mainboard/google/skyrim/variants/skyrim/overridetree.cb
View File

@ -146,7 +146,6 @@ chip soc/amd/mendocino
register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_76)"
register "stop_off_delay_ms" = "2"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 10 on end
end
chip drivers/generic/gpio_keys

1
src/mainboard/google/skyrim/variants/winterhold/overridetree.cb
View File

@ -230,7 +230,6 @@ chip soc/amd/mendocino
register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_76)"
register "stop_off_delay_ms" = "2"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 34 on end
end
chip drivers/generic/gpio_keys

1
src/mainboard/google/volteer/variants/collis/overridetree.cb
View File

@ -142,7 +142,6 @@ chip soc/intel/tigerlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F16)"
register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

1
src/mainboard/google/volteer/variants/copano/overridetree.cb
View File

@ -167,7 +167,6 @@ chip soc/intel/tigerlake
register "generic.reset_delay_ms" = "20"
register "generic.enable_delay_ms" = "7"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

1
src/mainboard/google/volteer/variants/delbin/overridetree.cb
View File

@ -175,7 +175,6 @@ chip soc/intel/tigerlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)"
register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

1
src/mainboard/google/volteer/variants/drobit/overridetree.cb
View File

@ -170,7 +170,6 @@ chip soc/intel/tigerlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)"
register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

1
src/mainboard/google/volteer/variants/eldrid/overridetree.cb
View File

@ -167,7 +167,6 @@ chip soc/intel/tigerlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)"
register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

1
src/mainboard/google/volteer/variants/elemi/overridetree.cb
View File

@ -229,7 +229,6 @@ chip soc/intel/tigerlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

1
src/mainboard/google/volteer/variants/halvor/overridetree.cb
View File

@ -71,7 +71,6 @@ chip soc/intel/tigerlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)"
register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

1
src/mainboard/google/volteer/variants/terrador/overridetree.cb
View File

@ -109,7 +109,6 @@ chip soc/intel/tigerlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F16)"
register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

1
src/mainboard/google/volteer/variants/todor/overridetree.cb
View File

@ -111,7 +111,6 @@ chip soc/intel/tigerlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F16)"
register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

1
src/mainboard/google/volteer/variants/trondo/overridetree.cb
View File

@ -37,7 +37,6 @@ chip soc/intel/tigerlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)"
register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

1
src/mainboard/google/volteer/variants/voema/overridetree.cb
View File

@ -73,7 +73,6 @@ chip soc/intel/tigerlake
register "generic.enable_delay_ms" = "10"
register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E3)"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

2
src/mainboard/google/volteer/variants/volet/overridetree.cb
View File

@ -53,7 +53,6 @@ chip soc/intel/tigerlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)"
register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end
@ -82,7 +81,6 @@ chip soc/intel/tigerlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)"
register "generic.enable_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 40 on end
end

1
src/mainboard/google/volteer/variants/volteer/overridetree.cb
View File

@ -133,7 +133,6 @@ chip soc/intel/tigerlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)"
register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

1
src/mainboard/google/volteer/variants/volteer2/overridetree.cb
View File

@ -187,7 +187,6 @@ chip soc/intel/tigerlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)"
register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

1
src/mainboard/google/volteer/variants/voxel/overridetree.cb
View File

@ -148,7 +148,6 @@ chip soc/intel/tigerlake
register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)"
register "generic.reset_delay_ms" = "20"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

1
src/mainboard/google/zork/variants/berknip/overridetree.cb
View File

@ -153,7 +153,6 @@ chip soc/amd/picasso
# 20ms: Firmware ready time
register "reset_delay_ms" = "32 + 20"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 39 on end
end
chip drivers/i2c/generic

2
src/mainboard/google/zork/variants/dalboz/overridetree.cb
View File

@ -53,7 +53,6 @@ chip soc/amd/picasso
# 20ms: Firmware ready time
register "reset_delay_ms" = "32 + 20"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 39 on end
end
chip drivers/i2c/generic
@ -74,7 +73,6 @@ chip soc/amd/picasso
register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_140)"
register "generic.reset_delay_ms" = "45"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 20 on end
end

1
src/mainboard/google/zork/variants/dirinboz/overridetree.cb
View File

@ -215,7 +215,6 @@ chip soc/amd/picasso
register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_144)"
register "stop_off_delay_ms" = "1"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 10 on end
end
chip drivers/i2c/hid

2
src/mainboard/google/zork/variants/ezkinil/overridetree.cb
View File

@ -111,7 +111,6 @@ chip soc/amd/picasso
# 20ms: Firmware ready time
register "reset_delay_ms" = "32 + 20"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 39 on end
end
chip drivers/i2c/hid
@ -128,7 +127,6 @@ chip soc/amd/picasso
register "generic.stop_off_delay_ms" = "10"
register "generic.stop_delay_ms" = "300"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

1
src/mainboard/google/zork/variants/gumboz/overridetree.cb
View File

@ -215,7 +215,6 @@ chip soc/amd/picasso
register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_144)"
register "stop_off_delay_ms" = "1"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 10 on end
end
chip drivers/i2c/hid

1
src/mainboard/google/zork/variants/morphius/overridetree.cb
View File

@ -129,7 +129,6 @@ chip soc/amd/picasso
register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_144)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 5d on end
end

1
src/mainboard/google/zork/variants/shuboz/overridetree.cb
View File

@ -150,7 +150,6 @@ chip soc/amd/picasso
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_140)"
register "reset_delay_ms" = "300"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 10 on end
end
chip drivers/i2c/generic

1
src/mainboard/google/zork/variants/trembyle/overridetree.cb
View File

@ -102,7 +102,6 @@ chip soc/amd/picasso
register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_144)"
register "stop_off_delay_ms" = "1"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 39 on end
end
chip drivers/i2c/generic

1
src/mainboard/google/zork/variants/vilboz/overridetree.cb
View File

@ -260,7 +260,6 @@ chip soc/amd/picasso
register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_144)"
register "stop_off_delay_ms" = "2"
register "has_power_resource" = "1"
register "disable_gpio_export_in_crs" = "1"
device i2c 10 on end
end
chip drivers/generic/gpio_keys

1
src/mainboard/google/zork/variants/woomax/overridetree.cb
View File

@ -127,7 +127,6 @@ chip soc/amd/picasso
register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_144)"
register "generic.stop_off_delay_ms" = "1"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 10 on end
end

1
src/mainboard/intel/adlrvp/devicetree_m.cb
View File

@ -269,7 +269,6 @@ chip soc/intel/alderlake
register "generic.enable_delay_ms" = "1"
register "generic.reset_delay_ms" = "300"
register "generic.has_power_resource" = "1"
register "generic.disable_gpio_export_in_crs" = "1"
register "hid_desc_reg_offset" = "0x01"
device i2c 0a on end
end