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soc/intel/icelake: Fix outb order 

Similar to CB:33940, fix outb orders.

Change-Id: I1d35235abc7e02e6058f07809b738635861cc9e4
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33960
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jeremy Soller <jackpot51@gmail.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
This commit is contained in:
Lijian Zhao 2019-07-02 23:22:36 +08:00 committed by Martin Roth
parent 78025f6c5c
commit 490b1d3b94
1 changed files with 2 additions and 2 deletions
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4
src/soc/intel/icelake/espi.c
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@ -194,10 +194,10 @@ static void pch_misc_init(void)
/* Setup NMI on errors, disable SERR */
reg8 = (inb(0x61)) & 0xf0;
outb(0x61, (reg8 | (1 << 2)));
outb((reg8 | (1 << 2)), 0x61);
/* Disable NMI sources */
outb(0x70, (1 << 7));
outb((1 << 7), 0x70);
};
static void clock_gate_8254(const struct device *dev)