From 491f66ee5984201a2b0face10ce2373f2c7f8ace Mon Sep 17 00:00:00 2001 From: Johnny Lin Date: Thu, 7 Apr 2022 09:16:32 +0800 Subject: [PATCH] soc/xeon_sp: Add weak mainboard_ewl_check for EWL check after FSP-M EWL (Enhanced Warning Log) is a FSP HOB generated by FSP-M that may contain several warnings/errors related to core, uncore and memory, etc. mainboard can override it in its romstage.c for its own Enhanced Warning Log check. Change-Id: I6f542e71d20307397c398fd757d9408438f681ed Signed-off-by: Johnny Lin Reviewed-on: https://review.coreboot.org/c/coreboot/+/69143 Reviewed-by: Angel Pons Reviewed-by: Jonathan Zhang Tested-by: build bot (Jenkins) --- src/soc/intel/xeon_sp/include/soc/romstage.h | 2 ++ src/soc/intel/xeon_sp/romstage.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/src/soc/intel/xeon_sp/include/soc/romstage.h b/src/soc/intel/xeon_sp/include/soc/romstage.h index 90689afc7f..a2adfed918 100644 --- a/src/soc/intel/xeon_sp/include/soc/romstage.h +++ b/src/soc/intel/xeon_sp/include/soc/romstage.h @@ -9,4 +9,6 @@ void mainboard_memory_init_params(FSPM_UPD * mupd); void mainboard_rtc_failed(void); void save_dimm_info(void); +void mainboard_ewl_check(void); + #endif /* _SOC_ROMSTAGE_H_ */ diff --git a/src/soc/intel/xeon_sp/romstage.c b/src/soc/intel/xeon_sp/romstage.c index b1c7b3b403..d001d61ece 100644 --- a/src/soc/intel/xeon_sp/romstage.c +++ b/src/soc/intel/xeon_sp/romstage.c @@ -15,6 +15,7 @@ void mainboard_romstage_entry(void) fsp_memory_init(false); printk(BIOS_DEBUG, "coreboot fsp_memory_init finished...\n"); + mainboard_ewl_check(); unlock_pam_regions(); @@ -31,3 +32,4 @@ __weak void mainboard_rtc_failed(void) } __weak void save_dimm_info(void) { } +__weak void mainboard_ewl_check(void) { }